In the embedded field, FPGAs are a very important type of device. Today, AMD announced the 40th anniversary of the first commercial Field Programmable Gate Array (FPGA) being introduced.
What stories lie behind FPGAs, what is the current development situation domestically and internationally, and can domestic FPGAs take the lead?
From Replacing ASICs to Edge AI
The disruption brought by FPGAs lies in the introduction of reprogrammable hardware. By creating “hardware as flexible as software,” FPGAs have changed the landscape of semiconductor design. For the first time, developers can design chips that can redefine their functions to perform different tasks if specifications or requirements change mid-course or even after manufacturing. This flexibility accelerates the development of new chip designs, speeds up time-to-market for new products, and provides an alternative to ASICs.
The impact of the invention of FPGAs on the market has been astonishing. FPGAs have created a 10+ billion dollar industry.
FPGAs were invented by the late Ross Freeman, co-founder of Xilinx (now part of AMD), an engineer and innovator who believed there had to be a better, more cost-effective way to design chips than standard fixed-function ASIC devices. FPGAs provided engineers with the freedom and flexibility to make immediate changes to chip designs and enabled the development and design of custom chips within a day. FPGAs also helped pioneer the “fabless” business model, changing the entire semiconductor industry. By eliminating the need for custom mask tools and associated non-recurring engineering costs, FPGAs demonstrated that companies do not need to own a foundry to create groundbreaking hardware; they only need vision, design skills, and FPGAs, thus helping to accelerate hardware innovation.
Since the shipment of the world’s first commercial FPGA (XC2064) 40 years ago, FPGAs have become ubiquitous in the electronics field and are deeply embedded in daily life. Today, adaptive computing devices, including FPGAs and adaptive SoCs as well as system-on-modules (SOMs), are everywhere, from cars, railway cars, and traffic lights to robots, drones, spacecraft, and satellites, as well as wireless networks, medical and testing equipment, smart factories, data centers, and even high-frequency trading systems.
The world’s first commercial FPGA XC2064 had 85,000 transistors, 64 configurable logic blocks, and 58 I/O blocks. In contrast, today’s most advanced AMD FPGA-based devices (such as Versal Premium VP1902) have 138 billion transistors, 18.5 million logic units, 2,654 I/O modules, up to 6,864 DSP58 engines, and a wide range of hard IP for memory, security, and interface technologies.
Since 1985, when Xilinx invented FPGAs, the capacity of FPGAs has increased more than tenfold, speed has increased more than a hundredfold, and price and power consumption have decreased more than a thousandfold.
In terms of applications, FPGAs are increasing their exploration in the field of edge AI, with more markets being leveraged by AI.
Today, most AI workloads run on data center GPUs. However, an increasing amount of AI processing is taking place at the edge. FPGA technology is at the forefront of the rapid growth of AI applications across various industries. FPGAs and adaptive SoCs provide low-latency processing of real-time sensor data, thereby accelerating AI inference at the edge. With the recent launch of smaller generative AI models, we can see the “ChatGPT moment” approaching, where these new AI models can run on edge devices, whether in AI PCs, vehicles, factory robots, space, or any embedded applications.
Looking ahead, FPGA-based adaptive computing will continue to drive breakthroughs in edge AI applications for autonomous driving, robotics and industrial automation, 6G networks, climate change, drug discovery, scientific research, and space exploration.
Four Global Giants in FPGA, Equal Competitors
After decades of oligopoly and industry consolidation, the current global FPGA market features AMD, Altera, Lattice, and Microchip as the four giants, sharing nearly 70%~80% of the market share.
First, AMD (Xilinx), as the inventor of FPGAs, has been the market leader in FPGA market share for the past 25 years. Over the past forty years, it has delivered over 3 billion FPGAs and adaptive SoCs (devices that combine FPGA architecture with system-on-chip and other processing engines) to more than 7,000 customers across various segments. In fact, it has been the leader in programmable logic market share for the past 25 years, and AMD believes that with the advantages of its product portfolio and roadmap, it is capable of maintaining its market leadership.
Over the past 40 years, AMD innovation and evolving market demands have led to many astonishing breakthroughs in FPGA technology:
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1985 : XC2064 – the first commercial FPGA
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1990 decade: XC4000 and Virtex™ FPGA – first to provide embedded RAM and DSP for wireless infrastructure.
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1999 : Launch of Spartan series – providing a cost-effective alternative to traditional ASICs for high-volume applications.
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2001 : The first FPGA integrated with SerDes.
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2011 : Virtex-7 2000T became the industry’s first production-deployed wafer-level chip (CoWoS) package — helping to pioneer the use of advanced 2.5D integration technologies that have become the foundation of HPC systems and are now driving the wave of AI GPU innovation.
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2012 : Zynq series – the first adaptive SoC that combines Arm CPU with programmable logic.
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2012 : Vivado™ Design Suite – enabling software developers to design with FPGAs.
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2019 : Launch of the first Versal ACAP – introducing dedicated AI engines and programmable on-chip networks (NOC).
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2019 : Vitis™ unified software platform – providing pre-optimized AI tools and abstractions to accelerate inference speed.
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2024 : Versal AI Edge series Gen 2 – integrating programmable logic, CPU, DSP and AI engines, achieving the first end-to-end AI acceleration on a single chip and supporting the next generation of applications requiring heterogeneous, low-latency, and high-efficiency computing.
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2024 : Spartan UltraScale+ FPGA series, further enriching the wide range of cost-optimized FPGAs and adaptive SoC product portfolio, providing cost-effective performance for edge I/O intensive applications.
From the above, it can be seen that AMD is particularly focused on AI, and besides the AI field, AMD is also particularly focused on the automotive sector. Smart cockpits have been a key focus for manufacturers in recent years, but automakers are gradually discovering that existing SoCs lack sufficient expansion capabilities and face certain challenges with multi-sensor fusion, in which case FPGAs have advantages. Recently, AMD launched the latest member of its automotive-grade (XA) series for ADAS sensor applications and in-vehicle infotainment systems (IVI), the Artix™ UltraScale+™ XA AU7P.
However, relatively speaking, AMD currently positions Xilinx’s FPGAs as part of the overall solution and does not particularly emphasize the special status of FPGAs. After all, FPGAs also have their own specialties and are not a universal solution; AMD wants to provide a complete product line of high-performance CPUs, GPUs, FPGAs, and adaptive SoCs.
Second, Altera has become an independent company again, and the FPGA landscape is changing again. Under the leadership of former CEO Pat Gelsinger, Intel began the process of divesting Altera. The new CEO Lip-Bu Tan, just two weeks into his tenure, has already started various initiatives. Tan has carefully planned to sell 51% of Altera’s shares for $4.46 billion to private equity giant Silver Lake Partners, valuing this FPGA manufacturer at $8.75 billion. Of course, this is much less than the $16.7 billion Intel paid to acquire Altera in June 2015.
After the split, Altera has placed significant emphasis on the Agilex product line and quickly released the Agilex™ 3 FPGA and SoC FPGA aimed at intelligent edge applications. Altera’s Agilex™ 3 FPGA and SoC can significantly improve cost-effectiveness without compromising performance. They help users elevate projects to new heights through excellent Hyperflex® FPGA architecture, advanced transceiver technology, higher integration, and stronger security features.
Interestingly, after the split, Altera also released benchmark comparison data between Agilex™ 3 and Lattice’s Certus-N2, showing that it overwhelmingly outperformed Lattice.
Third, Lattice has adhered to a mid-to-low-end strategy with small to medium-sized products, which has been its competitive strategy for many years, showing relatively stable performance over the years. Lattice is currently focusing on three markets.
In terms of AI, Lattice is exploring how to leverage AI, especially the latest research results in generative AI, to enhance the entire development process. Specifically, Lattice is focusing more on AI inference, especially in edge inference applications. Edge inference typically has higher power consumption requirements, while performance can be somewhat compromised. Motor control for robots and simulation robots is also a more traditional application for Lattice.
In the automotive sector, Lattice has been increasing its “Made in China for China” strategy, establishing very close partnerships with most domestic automotive Tier-1 manufacturers, and is very confident about the later market. In 2024, Lattice plans to launch 5 to 6 different application solutions for the automotive application field. If these new solutions are multiplied by the number of different Tier-1 manufacturers and the speed of new product iterations each year, the overall promotion speed of application solutions will show exponential growth in the later stage.
In the industrial sector, Lattice has very good expectations, as it already has numerous customers in China. Due to the complementarity between different industrial segments, certain slower-growing markets can be supplemented by others. Therefore, we view the industrial market as a baseline and the biggest driver of revenue growth.
Fourth, Microchip has been the “invisible champion” in the FPGA field, possessing many core technologies in its products, but it seems not to be mentioned as frequently as AMD, Altera, and Lattice.
This year, Microchip has also begun to compete for market share against AMD, Altera, and Lattice. Recently, Microchip adjusted the prices of its PolarFire field programmable logic FPGAs and system-on-chip (SoC) devices by disabling certain modules on the chip (especially transceivers) to lower pricing, reducing testing costs for PolarFire Core and PolarFire SoC Core, with overall prices dropping by 30%. Through the “module trimming” strategy, costs are reduced to achieve precise product positioning.
Additionally, it is worth noting that the PolarFire SoC product features a built-in five-core RISC-V architecture, supporting heterogeneous multi-system parallel operation, reflecting Microchip’s strategic direction towards an open instruction set architecture (ISA) ecosystem.
It can be said that Microchip’s price reduction is not only a pricing strategy but also a strategic move to compete for market share and ecological dominance. The focus of competition in the FPGA industry has shifted from transistor density to high-cost-performance computing platforms in the AI era.
Domestic FPGAs, Late Bloomers
“Chip manufacturing requires significant investment,” and in the FPGA field, the investment is even greater. Domestic FPGA design began in the 1990s, with real technological development occurring after 2000, starting more than ten years later than abroad.FPGA R&D has a high technical content, and there is a gap between domestic and foreign manufacturers in terms of the number of logic units and process technology.
Currently, there are more than 28 domestic companies related to FPGA R&D, including listed companies such as Fudan Microelectronics, Anlogic Technology, and Hangjin Technology, while Chengdu Huamei Electronics has been “inquired” for listing, and Unisoc has recently initiated listing guidance. Companies like Yun Semiconductor, Jingwei Qili, Zhongke Yihaiwei, Zhiduojing, Aoge Chip, and Yiling Si have also been highlighted.
Specifically, Fudan Microelectronics was one of the first to launch billion-gate FPGAs, and the next generation of billion-gate products is under development, with a technical reserve for programmable system-on-chip; Unisoc covers high, medium, and low-end multi-level FPGA markets; Anlogic Technology has reserves in single-chip products integrating FPGA, CPU, and dedicated data processing engines, with mass-produced products covering logic unit scales within 100K, and the logic units in the PHOENIX1 series have successfully taped out at 400K; Jingwei Qili has successfully mass-produced FPGAs based on 22nm process technology; Yiling Si has commercialized FPGAs based on RISC-V soft cores, with long-term product planning in 16nm and 40nm; Xi’an Zhiduojing has independently developed Seal 5000 and Sealion 2000 series FPGA/CPLD chips, which have been evaluated and certified by the Ministry of Industry and Information Technology’s Fifth Research Institute and passed the autonomous controllability level assessment.
Looking at the key business data of companies like Anlogic Technology, Unisoc, and Fudan Microelectronics, the proportion of R&D expenses once exceeded 100%, leading to a period of negative net profit. However, thanks to policy support and research project funding subsidies, this predicament has been alleviated to some extent.
Comparing with international cutting-edge products, there is still a significant gap in core parameters. However, domestic companies are also paying great attention to building a software ecosystem.
For example, the Intelligent Computing Platform is a deep convolutional neural network acceleration platform based on FPGA developed by Fudan Microelectronics over three years, featuring high computing power and low power consumption, providing up to 1TGOPS of computing power, flexibly supporting mainstream deep neural networks such as VGG, YOLO, FaceNet, and others.
Additionally, in May 2022, Anlogic Technology released the SF1 series FPSoC devices, which achieved the integration of RISC-V and programmable logic advantages in a single chip, gaining widespread market attention.
Furthermore, the Pango Design Suite EDA suite is a large-scale FPGA development software developed by Unisoc based on years of FPGA development software technology research and engineering practice experience, possessing independent intellectual property rights, and can support the design and development of tens of millions of gates of FPGA devices.
In summary, domestic FPGAs mainly face the following three development bottlenecks:
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Professional barriers: The US holds almost all core patents for FPGAs, but many patents are gradually expiring as FPGAs have been commercialized for some time.
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Talent issues: There is a severe shortage of professional talent in core EDA tools, especially senior talent in layout and routing algorithms;
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Ecological environment: Currently, the ecosystem is primarily dominated by AMD (Xilinx), Altera, and Lattice, making it difficult for latecomers to establish ecological advantages, as both the IP resource circle and development resource circle need to be built from scratch.
However, with the further heat of edge AI and the gradual expiration of patents, the development of domestic FPGAs is ushering in spring. These companies also generally have products related to the combination of FPGAs and AI.
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