In the rapidly developing field of AIOT (Artificial Intelligence of Things), the balance between chip performance and power consumption, as well as the diversity and adaptability of functions, have become the focus of the industry. As a leading domestic video surveillance chip company, SigmaStar Technology (SZ301536) has launched a popular computing power AIOT chip – … Read more
Due to current software limitations, the RISCV logic cannot share JTAG simultaneously. Therefore, if you want to debug both the logic and RISCV at the same time, you can achieve this through the RISCV’s soft JTAG. Soft JTAG is a software implementation of JTAG using GPIO. Here, we will demonstrate this using the TI60F225 DEMO. … Read more
Debugging code can sometimes take longer than writing it. So how do we use QEMU + GDB to debug RISCV programs? To document this process, we will write the following assembly code using the ADD instruction as an example. We will put 1 into register x2, 2 into register x3, and then add the values … Read more
The riscv-gcc tool includes some built-in macro parameters. We can use these built-in macros to determine the behavior of the compiler. 1. Viewing GCC Built-in Macro Parameters Here, we take the riscv-nuclei-elf-gcc toolchain released by Chipone Technology as an example. Using the following command, we can get the built-in macro parameters of this tool: riscv-nuclei-elf-gcc … Read more