To use the Cortex-M microcontroller in general applications, one needs to understand several aspects, including the programming model, how exceptions (such as interrupts) are handled, memory mapping, how to use peripherals, and how to utilize the software driver libraries provided by the microcontroller vendor. First, let’s take a look at the programming model of the … Read more
The original text is a discussion on Zhihu regarding “Is Huawei’s NPU Ascend chip a major strategic misstep, and should GPGPU have been chosen, leading to the CANN software stack facing obsolescence?” Many respondents provided insightful comments, and this article organizes the excellent responses from several contributors. —————————————— The main text begins: The essence of … Read more
This is a further refinement of the Cortex-M3 programming model, covering more specific implementation details and key operations: 1. Refinement of Register Groups 1. Detailed Explanation of Special Registers CONTROL Register (32 bits, modifiable only at privileged level) Bit 0 (`nPRIV`): 0 = Privileged mode (can access all resources) 1 = Unprivileged mode (restricted access) … Read more
In embedded systems, Cortex-M3 is a 32 bit RISC processor core designed by ARM and is widely used in low-power, real-time applications (such as IoT, industrial control, etc.). Its programming model defines the architectural features, registers, memory access, exception handling mechanisms, and other aspects that developers need to understand. Below are the core contents of … Read more