Lessons from MIPS’ Fall for Chinese Chip Companies

Lessons from MIPS' Fall for Chinese Chip Companies

Recently, foreign media reported that MIPS Technologies announced it would abandon the design of the MIPS instruction set and shift to RISC-V. In response, Tieliu couldn’t help but sigh, “Forty years east of the river, forty years west of the river“. MIPS, as the first commercially available RISC instruction set, has been abandoned by the … Read more

Designing a Free MIPS Processor in 10 Days (Source Code Included)

Designing a Free MIPS Processor in 10 Days (Source Code Included)

Source: EETOP BBS Author: leishangwen (Community Moderator) Recently, Wave officially announced that it will grant free licenses for the MIPS Instruction Set Architecture (ISA) to global customers. This initiative provides free access to the MIPS architecture for semiconductor companies, developers, and universities worldwide, enabling them to develop the next generation of System on Chip (SoC). … Read more

The Difficult Path from MIPS to RISC-V

The Difficult Path from MIPS to RISC-V

The report from Electronic Enthusiasts (by Electronic Enthusiasts) states that 38 years ago, an innovative RISC ISA was born at Stanford University in the United States, leading to the emergence of MIPS. With this project, several founders established MIPS Corporation, which successively launched the R2000 and R3000 microprocessors in the 1980s. Because of this, MIPS … Read more

The Decline of MIPS Architecture

The Decline of MIPS Architecture

In fact, MIPS has long been dead, merely maintaining vital signs through an external circulatory system. The external circulatory system of MIPS consists of former MIPS chip design companies, such as Loongson’s desktop and server CPUs and Junzheng’s mid-to-high-end embedded CPUs. They only use the MIPS instruction set, while the CPU cores are entirely independently … Read more

Exploiting MIPS Stack Overflow Vulnerability

Exploiting MIPS Stack Overflow Vulnerability

This is an exploitation of a stack overflow vulnerability in D-link routers before login. This article focuses on recording the problems and analyses encountered during practical testing, serving as a reading note. Static Analysis The DIR-605L router has a stack overflow at the login point. In the login form, there is a parameter called FILECODE, … Read more

In-Depth Discussion of Four Mainstream CPU Architectures

In-Depth Discussion of Four Mainstream CPU Architectures

RISC (Reduced Instruction Set Computer) is a microprocessor that executes a small number of instruction types, originating from the MIPS mainframe in the 1980s (i.e., RISC machines), collectively referred to as RISC processors. This allows it to execute operations at a faster speed (millions of instructions per second, or MIPS). Each type of instruction executed … Read more

VAN RYSEL 500 MIPS Helmet Review: High Cost-Performance

VAN RYSEL 500 MIPS Helmet Review: High Cost-Performance

The editor tested the “349” model back in 2017, when it was still called B’TWIN AEROFIT 900. However, with the adjustment of the product line naming, it now belongs to the VAN RYSEL brand. It’s impressive that after five years, the price of the “349” hasn’t increased, which shows some integrity. Given the increasing demand … Read more

Mitochondrial Signal Transduction: A Comprehensive Overview

Mitochondrial Signal Transduction: A Comprehensive Overview

[Selected Literature – Literature Review] Mitochondrial signal transduction The analogy of mitochondria as energy sources is outdated. Mitochondria are living, dynamic, genetic, energy-transforming, biosynthetic, signaling organelles that actively transduce biological information. We consider mitochondria to be the processors of cells, forming the mitochondrial information processing system (MIPS) alongside the nucleus and other organelles. In a … Read more

Chip Performance: From MIPS to TOPS

Chip Performance: From MIPS to TOPS

Click the above“Mechanical and Electronic Engineering Technology” to follow us In today’s age of information explosion, evaluating chip performance has become increasingly important. Whether it’s smartphones, computers, or various smart devices, their performance largely depends on the chip’s performance. When discussing chip performance, we must mention two important metrics: MIPS and TOPS. These two metrics … Read more

Understanding Two Major Reduced Instruction Sets: RISC-V and MIPS

Understanding Two Major Reduced Instruction Sets: RISC-V and MIPS

| Source: SIMIT Strategic Research Office (ID: SIMITSRO) Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences The two major architectures of current CPUs are CISC (Complex Instruction Set) and RISC (Reduced Instruction Set). x86 is the representative architecture of CISC, occupying over 95% of the desktop computer and server market. Arm, as … Read more