| Source: SIMIT Strategic Research Office (ID: SIMITSRO) Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences The two major architectures of current CPUs are CISC (Complex Instruction Set) and RISC (Reduced Instruction Set). x86 is the representative architecture of CISC, occupying over 95% of the desktop computer and server market. Arm, as … Read more
Instruction sets can be divided into Complex Instruction Set Computing (CISC) and Reduced Instruction Set Computing (RISC), represented by the architectures x86, ARM, and MIPS. ARM RISC is a chip architecture designed to improve processor speed, with key technology in pipelining, which allows multiple instructions to be completed in one clock cycle. Compared to Complex … Read more
Author: Yang Jiankai Editor: Li Motian / Dong Guidance Produced by: Yuanchuan Research Institute Technology Group Support: Huatai Computer Industry Chief Xie Chunsheng On January 10, 2006, Apple’s annual Macworld conference was held, but the star of the event was not Steve Jobs, but Intel CEO Paul Otellini, dressed in a lab coat. Amidst the … Read more
Introduction Remote debugging with QEMU is quite simple; just enable the -g parameter to bind to a local port. However, IDA requires some configuration to debug MIPS architecture binary files and pause processes for debugging. (There are many online tutorials on how to run IDA in Linux and set up the buildroot environment, or feel … Read more
Author: Member of Hongri Security lifeand Blog Address: http://sec-redclub.com/team/ Book Giveaway: “Unveiling Home Router 0day Vulnerability Exploitation Techniques” Event Address: Free book giveaway in March Testing Environment Debian 9 Qemu This article mainly discusses the development of an exploit for the buffer overflow vulnerability in routers, using CVE-2013-0230 as an example. 0x01 Environment Setup Using … Read more