Today, we will only write code. Features: 1. Use the Bluetooth functionality of the ESP32-S3 chip to connect, while displaying the Bluetooth connection status. 2. The onboard RGB LED alternates flashing blue and red to indicate waiting for connection status; the green light indicates connected, and the red light indicates disconnected. 3. IO12 and IO3 … Read more
Hello, it has been a while since I shared some insights on Rust in embedded systems. Below is a demonstration of the GUI effect of Rust on the ESP32-S3.The project uses: esp-hal latest version esp-hal = { version = "1.0.0-beta.1", features = [ "esp32s3", "psram", "unstable", "log-04",] } The GUI library used is Slint, version … Read more
“ This article focuses on the Wi-Fi architecture and TCP/IP protocol implementation of the ESP32-S3. It analyzes the core modules integrated into its 40nm chip, including the RF front end and baseband, details the STA/AP working modes, dissects the STA connection process and data path, and compares the OSI and TCP/IP protocol stack implementations.” 01 … Read more
“This article introduces the Wi-Fi UDP communication of the ESP32-S3. It is based on a dual-core processor, supports relevant protocols, and implements UDP transmission through the lwIP protocol stack. The article explains the working principle and process, provides program design code, and demonstrates test results, highlighting its application in scenarios such as the Internet of … Read more
In a previous article, we briefly analyzed the architecture of MCU chips.Analysis of MCU chip system architectureIn fact, most WIFI chips can be considered as MCU chips, so the SoC architecture of WIFI chips is basically the same as that of MCU chips, which includes the CPU, bus, peripherals, and of course, the WIFI IP … Read more
Sharing is a positive attitude towards life! Project Requirements ESP32-S3 is an MCU chip that integrates 2.4 GHz Wi-Fi and Bluetooth 5 (LE), supporting Long Range mode. The ESP32-S3 is equipped with a Xtensa® 32-bit LX7 dual-core processor, with a maximum frequency of 240 MHz, 512 KB of built-in SRAM (TCM), 45 programmable GPIO pins, … Read more
“ The ESP32-S3 features dual-core processors, CPU0 and CPU1, along with an ultra-low-power co-processor (ULP). CPU0 is responsible for system initialization and complex computations, while CPU1 handles real-time tasks in parallel. The ULP operates at low power when the main cores are in sleep mode. The three cores collaborate through code to allocate tasks efficiently, … Read more
“This article focuses on the system timer (SYSTIMER) of the ESP32-S3, introducing its 52-bit counting unit, three comparison channels, and clock source characteristics. It explains the working principle based on clock division and counting comparison, and demonstrates its application in precise timing and interrupt triggering through an LED blinking example.” 01 — Introduction to SYSTIMER … Read more
“This article focuses on the GPTIMER of the ESP32-S3, introducing its two groups of four 54-bit general-purpose timers, their composition and characteristics, and comparing them with the SYSTIMER. It explains the working principles based on clock division and counting comparison, demonstrating its applications in precise timing scenarios through LED toggling examples in free-running, one-shot, and … Read more
“ This article focuses on the SHA, AES, RSA, and HMAC hardware accelerators in the ESP32-S3, explaining how dedicated circuits enhance encryption efficiency. By comparing the algorithm characteristics and application scenarios of different accelerators, along with program examples involving data hashing and encryption/decryption, it demonstrates their collaborative role in ensuring data security and efficiency.” 01 … Read more