Analysis of DTC Module Block Diagram
19.4 Analysis of DTC Module Block Diagram 19.4.1 Internal Registers of DTC The MRA, MRB, SAR, DAR, CRA, and CRB are all internal registers of the DTC that cannot be accessed directly by the CPU. The values set in these internal DTC registers are placed in the SRAM area as transfer information. When an activation … Read more