Low Power Design: Architecture Level Optimization
In the previous article, we introduced methods forsystem-level low power design, such ashardware-software co-design,power management mechanisms, etc. This issue will delve into the core technologies ofarchitecture-level low power design, includingmulti-voltage design (Multi-VDD),dynamic voltage frequency scaling (DVFS),system clock optimization,asynchronous design, andalgorithm optimization. By reasonably dividing power supply areas, dynamically adjusting voltage and frequency, and optimizing clock … Read more