Low Power Design: Architecture Level Optimization

Low Power Design: Architecture Level Optimization

In the previous article, we introduced methods forsystem-level low power design, such ashardware-software co-design,power management mechanisms, etc. This issue will delve into the core technologies ofarchitecture-level low power design, includingmulti-voltage design (Multi-VDD),dynamic voltage frequency scaling (DVFS),system clock optimization,asynchronous design, andalgorithm optimization. By reasonably dividing power supply areas, dynamically adjusting voltage and frequency, and optimizing clock … Read more

Chapter 5: Low Power Design

Chapter 5: Low Power Design

Low Power Design 5.1 Power Consumption Sources Surge、Static Power Consumption and Dynamic Power Consumption are the three main sources of power consumption. • Surge current refers to the maximum instantaneous input current generated when the device is powered on, and is also known as startup current in applications. • Standby current refers to the current … Read more