Understanding the MIPI Framework: A Comprehensive Guide

1. Introduction

1. The MIPI Alliance, or Mobile Industry Processor Interface Alliance, is an open standard and specification initiated by MIPI for mobile application processors.

2. The MIPI Alliance defines a set of interface standards, standardizing internal interfaces of mobile devices such as cameras, displays, basebands, and RF interfaces, thus increasing design flexibility while reducing costs, design complexity, power consumption, and EMI.

3. There are many interface standards between sensors and microcontrollers, such as UART, I2C, I2S, SPI, SDIO, etc. Various parallel interfaces related to camera sensors and displays have also emerged, leading to confusion during design due to multiple different interface standards. Meanwhile, using parallel interfaces typically involves more than 10 signals for camera sensors and up to 20 for displays, which can lead to transmission congestion. Furthermore, parallel interfaces do not have advantages in terms of cost, size, weight, or the reliability of each signal (each signal and node can potentially fail).

4. MIPI is not a single interface or protocol but includes a set of protocols and standards to meet the unique requirements of various subsystems (image subsystems [cameras and displays], storage subsystems, wireless subsystems, power management subsystems, low bandwidth subsystems [audio, keyboard, mouse, Bluetooth]).

Visit the MIPI official website: https://www.mipi.org

2. MIPI Framework

MIPI mainly includes protocols in four areas:

1. Multimedia

2. Control & Data

3. Chip-to-Chip Inter-Process Communications

4. Debug & Trace

The four areas serve the following purposes, distinguished by color:

1) MIPI Multimedia Spec

The most commonly discussed protocols in the multimedia direction are:

The above figure is divided into three layers: application layer, protocol layer, physical layer.

Term Introductions:

DSI: Display Serial Interface, defines a high-speed serial interface between the processor and display module.

CSI: Camera Serial Interface, defines a high-speed serial interface between the processor and camera module.

DCS: Display Command Set, a standardized command set used for command mode display modules.

D-PHY, C-PHY, A-PHY, M-PHY: Provide physical layer definitions for DSI and CSI, with D-PHY being the most discussed and widely used protocol.

Examples:

Among the protocols currently published by MIPI, there are three types of camera-based interfaces: one is the D-PHY interface that was popular a few years ago, another is the C-PHY interface, and the last is the M-PHY interface.

D-PHY interface generally has 1/2/4 lanes, each lane uses a differential pair, iscurrent-driven, with a single signal amplitude typically around 200mv, and the differential amplitude is about 400mv. The wiring requirement is that they must be equal length and paired; D-PHY has a separate synchronization clock for synchronization,with a maximum of 10 lines, making decoding and receiving easier;

D-PHY’s physical layer supports HS (High Speed) and LP (Low Power) modes.HS mode:low voltage differential signals, high power consumption, high speed (80M -1Gbps), signal amplitude (100mv-300mv).LP mode:single-ended signals, low power consumption, low speed (< 10Mbps), signal amplitude (0-1.2V).

C-PHY interface consists of 1/2/3 trio, each trio uses 3 lines,with a maximum of 9 lines, which is one less than D-PHY, but can transmit a larger amount of data. C-PHY isvoltage-driven, and since it operates in pairs, the absolute signal amplitudes are 0, 100, 200mv, which are relatively weak and unfavorable for transmission.No separate synchronization signal line is available, so transmission distances must be short and cannot use differential pairs.

M-PHY, similar to USB, uses completely asynchronous transmission, and currently there are no corresponding sensors on the market, so no further introduction will be provided.

CSI-2 is mainly used for image input (generally connecting to sensors), while DSI-2 is mainly used for image output (generally outputting to displays).

The logic block diagram for the camera capturing images is as follows:

Therefore, D-PHY is divided into Master and Slave ends.

2) MIPI Control & Data

3) MIPI Chip-to-Chip Communications Spec

4) MIPI Debug Spec

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