【Content Overview】An AI chip with only 22 nanometers and energy consumption as low as microjoules, designed specifically for always-on wearable devices and the Internet of Things. This is not just a technological iteration, but a reflection of the rise of the open architecture RISC-V. When such flexible and efficient technological innovations meet a national strategy promoting chip autonomy, what sparks will fly? This article will delve into the potential of the RISC-V architecture through EMASS’s new product and its key role in the context of Sino-U.S. technological competition.

Micro-Watt AI Chips and National Strategy: How RISC-V Reshapes the Future of Chips?

💡 Starting with a “Never-Sleep” Chip

Imagine your smartwatch, home sensors, and predictive maintenance systems in factories all having 24/7 uninterrupted intelligence, yet consuming power so low it is almost negligible. This is not science fiction, but a technological reality that is happening now.

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Recently, EMASS, a subsidiary of Nanoveu, launched a 22-nanometer microprocessor named ECS-DoT, targeting milliwatt-level power consumption for edge computing and IoT devices. According to a report from embedded.com^[1], this chip consumes only 1 to 10 microjoules (µJ) per inference, with standby power below 100 microwatts (µW). This means it can truly achieve “always-on” functionality, bringing revolutionary experiences to wearable devices, drones, and other scenarios.

Mohamed Sabry, founder and CTO of EMASS, revealed its core technology in an interview:

• • Hybrid Memory Architecture: Innovatively combines up to 2MB of SRAM (volatile) and 2MB of MRAM/RRAM (non-volatile), achieving a balance between high-speed computing and model persistent storage within a total memory of 4MB.
• • Custom AI Accelerator: Based on the open standard RISC-V architecture, it integrates a 2D MAC (Multiply-Accumulate) array, hardware-level processing of convolution and activation functions, and supports INT8/INT4 quantized inference, significantly reducing computational and memory overhead.

In simple terms, ECS-DoT achieves sufficiently powerful edge AI computing capabilities at extremely low power consumption through sophisticated hardware and software design. However, what is more noteworthy than the chip itself is the technological foundation it has chosen—RISC-V.

🌍 RISC-V: How Open Architecture Becomes the Key to Breakthroughs?

For a long time, the chip architecture market has been dominated by two giants: Intel’s x86 architecture and Arm architecture. They are powerful and have mature ecosystems, but they also have high licensing fees and inflexible designs. RISC-V, on the other hand, is completely different; it is an open-source instruction set architecture (ISA).

This means:

• • Open and Free: Anyone can freely use the RISC-V instruction set to design, manufacture, or sell chips.
• • Modular and Scalable: Companies can freely choose and expand the instruction set according to their needs, avoiding unnecessary complexity.
• • Geopolitically Neutral: RISC-V is managed by a neutral international foundation, providing valuable certainty for companies facing technology acquisition restrictions.

These characteristics have led to the rapid rise of RISC-V in the fields of IoT and AI chips, which pursue high efficiency, customization, and low cost. The ECS-DoT chip is an excellent example. But the story of RISC-V goes far beyond this.

🇨🇳 Great Power Game: Why Is China Betting on RISC-V?

When technological innovation meets geopolitics, its strategic significance is magnified infinitely. Almost simultaneously with EMASS’s product launch, a report from The Business Times^[2] indicated that China is planning to release a national policy to promote the widespread application of RISC-V chips domestically.

This move is backed by profound strategic considerations. In the context of increasingly fierce Sino-U.S. technological competition, reducing dependence on Western technology and establishing a self-controllable semiconductor industry chain has become a national priority for China. The open-source and neutral RISC-V naturally becomes a key pathway to achieve this goal.

The Chinese government, academia, and tech giants are working together:

• • Policy Support: Up to eight government departments are jointly drafting policy documents to promote RISC-V, aiming to elevate it to a national strategic level.
• • Research First: The Chinese Academy of Sciences has launched the “Xiangshan” high-performance RISC-V processor project since 2019, aiming to create world-class open-source processor cores.
• • Industry Giants Involved: Alibaba’s “Xuantie” and companies like Huawei have already deeply engaged in the RISC-V field, developing processors for various scenarios such as AI and consumer electronics.

「 Core Viewpoint 」RISC-V is not just a technological architecture iteration; it is more like the “Linux” of the semiconductor field, providing a third choice for the global chip industry through an open and collaborative model, and becoming a key variable in the geopolitical game seeking technological autonomy.

From EMASS’s pursuit of extreme energy efficiency in AI chips to China’s nationwide push for industrial policy, we see the same trend manifesting in two sides of the same coin. On one hand, RISC-V, with its technical flexibility and economic low cost, is empowering countless innovative companies like EMASS to achieve breakthroughs in niche markets. On the other hand, its strategic openness and autonomy provide a possibility for a great power to respond to external technological restrictions and reshape the global semiconductor landscape.

In the future, as the ecosystem continues to mature, whether RISC-V can truly challenge the dominance of x86 and Arm remains to be seen. But it is certain that this chip revolution driven by open architecture has already begun.

👇 Do you think the open-source RISC-V architecture can shake the dominance of Arm and Intel in the future? Why? Feel free to leave your insights in the comments.

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Reference Links

<span>[1]</span> Report from embedded.com: https://www.embedded.com/22nm-risc-v-ai-chip-targets-wearables-and-iot<span>[2]</span> Report from The Business Times: https://www.businesstimes.com.sg/pulse/article/5962348