Summary of Embedded Knowledge Level 3 (ARM Instruction Series)

1. Shift Operation Instructions LSL, LSR, ASR, ROR, RRX

Summary of Embedded Knowledge Level 3 (ARM Instruction Series)

2. Instruction Condition Code

Summary of Embedded Knowledge Level 3 (ARM Instruction Series)

3. Memory Access Instructions

— LDR Word Data Load Instruction.LDR instruction is used to transfer a 32-bit word data from memory to the destination register. This instruction is usually used to read 32-bit word data into a general-purpose register for processing.

— LDRB Byte Data Load Instruction.LDRB instruction is used to transfer an 8-bit byte data from memory to the destination register, while clearing the upper 24 bits of the register. This instruction is usually used to read 8-bit byte data into a general-purpose register for processing.

— LDRH Halfword Data Load Instruction.LDRH instruction is used to transfer a 16-bit halfword data from memory to the destination register, while clearing the upper 16 bits of the register. This instruction is usually used to read 16-bit halfword data into a general-purpose register for processing.

— STR Word Data Store Instruction.STR instruction is used to transfer a 32-bit word data from the source register to memory.

— STRB Byte Data Store Instruction.STRB instruction is used to transfer an 8-bit byte data from the source register to memory.

— STRH Halfword Data Store Instruction.STRH instruction is used to transfer a 16-bit halfword data from the source register to memory.

4. Arithmetic Operation Instructions

Summary of Embedded Knowledge Level 3 (ARM Instruction Series)

5. Logic Operation Instructions

AND

Logical AND Operation Instruction

ORR

Logical OR Operation Instruction

EOR

Logical XOR Operation Instruction

BIC

Bit Clear Instruction

6. Other Common Instructions

CMP

Comparison Instruction

MUL

32-bit Multiplication Instruction

B

Branch Instruction

BL

Branch with Link Instruction

SWI

Software Interrupt Instruction SWI 12

MRS

Read Status Register Instruction MRS R0,CPSR

MSR

Write Status Register Instruction MSR CPSR,R1

DCB

Used to allocate a contiguous block of memory and initialize with specified data

CODE16/CODE32

Tells the compiler the type of the following instructions

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