Dialogue Guests
Wu Xiongang Chairman of CoreLab Tech, Singapore
Aniket Saha Vice President of Tenstorrent, USA
Meidi CEO of Xim Semiconductor Technology Co., Ltd. (Xim Computing)
Since2010, the fifth generation reduced instruction set (RISC-V) has gradually experienced explosive growth with the joint efforts of the global academic and industrial communities. It has now become one of the three most important computing instruction sets globally, alongsidex86 and ARM. As a powerful engine for empowering industrial innovation, RISC-V has opened up a new path for technological innovation in China. In 2024, China contributed over half of the global shipments of RISC-V chips, and industry forecasts predict that China will dominate the global RISC-V market in the coming years. However, RISC-V also faces many difficulties and challenges in the process of industrial development.
During the fifth RISC-V China Summit, three professional companies in the global RISC-V field, Tenstorrent, Corelab Tech, and Xim Computing, collaborated to create an integrated platform called “CPU + Ecosystem + NPU,” which is considered a key initiative to fill industry gaps. What value can this collaboration bring to breaking through the bottlenecks in RISC-V AI development? How can we better promote the construction of the RISC-V AI open-source ecosystem? How can the development of RISC-V AI technology better unfold international collaboration?
AIThe era requires architectural innovation Open architecture provides the soil for innovation
Wu Xiongang: We chose to build an innovation platform using RISC-V for several reasons. First, my years of experience at ARM have made me deeply aware that the core trend in the industry is that the more open it is, the more conducive it is to innovation and the faster it accelerates innovation. Second, AI, as the largest technological revolution today, inevitably requires a new architecture to adapt to the changes in data, computing needs, and loads in different scenarios. The primary goal of ARM is to rapidly increase revenue and consolidate its monopolistic advantage, which makes it difficult to meet the needs of emerging applications. Only an open architecture can provide the soil for innovation.
Looking back, we have helped many pioneers grow from small businesses into industry giants while at ARM. In this wave of AI, we hope to empower innovators through a more open RISC-V platform. At the same time, during the current development of AI, the computing power issue urgently needs to be addressed, and the open-source RISC-V architecture is the best path to break through the computing power dilemma. We hope that through a more open architecture, new innovators and pioneers will have better opportunities for success.
Aniket Saha: I have been working in the CPU IP field for a long time, and RISC-V provides end users with more control than any traditional architecture, allowing users to customize, add extensions, and configure according to their needs. For example, our Tensix core has five embedded RISC-V processors. If we were to implement this with other traditional architectures, we would first need to obtain an architecture license, build the core ourselves, and spend a lot of money. However, RISC-V gives us the freedom and capability to innovate.
AI models are changing rapidly every year, and companies need complete control over the entire AI stack from algorithms to devices. There are various customization needs in the market, which traditional architectures cannot support because they are designed for general-purpose architectures. RISC-V enables us to understand and analyze workloads and design the most suitable processors.
Meidi: Xim Computing chooses RISC-V primarily because it is the best architecture in terms of balancing flexibility, scalability, and programmability. As AI technology has developed to this point, the “Moore’s Law” is gradually becoming ineffective. With the convergence of large models and the current limitations of large chip manufacturing processes, the design goal of chips is to squeeze every bit of computing power, especially for inference tasks. From this perspective, using the same process area and memory bandwidth, minimizing overhead losses and improving efficiency must be achieved through extreme optimization at the software and hardware collaboration level, even down to the system level.
In this field, RISC-V provides us not only with flexibility but also helps us achieve optimization across the entire system from CPU to NPU to DPU. When we pursue extreme optimization, we optimize all components of the system, including different chips and the entire computing architecture, to provide the market with the best solution. For example, Xim Computing’s NPU card, through deep adaptation with Tenstorrent‘s CPU and combined with Corelab Tech‘s system-level optimization, has improved collaborative efficiency to over 90%, thus achieving a system-level improvement in computing efficiency.
The prosperity of the open-source ecosystem requires “co-construction and sharing”
Wu Xiongang: The open-source ecosystem needs “hardware anchors.” We will release the hardware design specifications of the platform, allowing downstream manufacturers to conduct secondary development based on the specifications, ensuring compatibility while retaining flexibility. At the same time, we will jointly establish a “RISC-V AI Testing and Certification Center,” open-source testing tools, and benchmark datasets to avoid “reinventing the wheel.”
Creating AI computing chips requires multiple computing steps and needs to optimize customized computing platforms. RISC-V is a new thing, and only through collective efforts can we solve this problem. Currently, RISC-V is more prevalent in mid-to-low-end applications, but there are still relatively few that can perform well in high-performance computing. Through our tripartite cooperation, we aim to create a universal platform that can interface with various computing cards, ultimately achieving integration.
Aniket Saha: Open-source is not about “free sharing,” but about “standardized collaboration.” We plan to open-source the collaborative interfaces and parallel computing protocols between CPU and NPU for community reference and optimization, and jointly initiate the “RISC-V AI Computing Power Competition” with universities and research institutions to attract developers to build models based on the platform. Compared to closed-source architectures, RISC-V‘s open-source nature allows AI acceleration algorithms to be directly optimized based on the instruction set, and the tripartite collaboration will output an “open-source acceleration library” (such as an operator library adapted for large model inference), reducing the migration costs for developers.
We are trying to eliminate the barriers to entry for RISC-V. We have donated a large amount of validated collateral to the open-source community, and we also plan to open-source already validated cores. For RISC-V to succeed in the future, the industry needs high-quality open-source cores.
Meidi: This is a very good question. In terms of co-construction and sharing in the open-source ecosystem, Xim Computing has mainly done three things. First, we lead and advocate for the formulation of technical standards and the promotion of open-source projects, especially playing a leading role in the standardization work of the RISC-V Matrix extension, proposing an efficient matrix operation instruction set and releasing open-source projects through GitHub to provide a technical framework for global developers to reference and participate in. Second, we are building a full-stack open-source solution: launching a “chip + AI” full-stack closed-loop solution based on the RISC-V architecture, covering chips, computing power services, model adaptation, and intelligent applications, facilitating developers to conduct secondary development and application landing based on our solution, promoting the technical practice and achievement sharing of the open-source ecosystem.
The third thing is to participate in international open-source community collaboration. We actively contribute to the relevant work of the RISC-V International Foundation, promoting the globalization of the RISC-V open-source ecosystem. In this collaboration, Xim Computing will open-source the adaptation driver code for NPU and RISC-V CPU, contributing large model deployment cases to help developers get started quickly. We will also promote the “RISC-V AI Ecosystem Alliance,” collaborating with cloud vendors and algorithm companies to build a model adaptation community, achieving “one optimization, full ecosystem reuse,” accelerating the landing of open-source models on the RISC-V platform.
RISC-V technology development requires international collaboration
Wu Xiongang: In the context of globalization, RISC-V is actually a bridge for international cooperation. The development of RISC-V technology requires international collaboration. To promote the global application of RISC-V technology, we first need a unified standard to share resources; then we need to attract participation from different countries and share talent. Additionally, we need to develop different technologies based on the varying needs of different countries and regions.
In this regard, our globalization path is “localized products + global standards,” launching regionally customized platforms (such as adapting to local power standards and data compliance requirements) in the Asia-Pacific, Europe, and the United States, while maintaining unified core technology standards. Our positioning is to be the “global bridge for RISC-V AI” products, helping to transform technological innovations in different regions into standardized products, achieving the global flow of “technology – products – market.”
Looking ahead, I believe that RISC-V has now entered a stage of upward movement, and I expect that by this time next year, there will be many new high-performance computing chips based on RISC-V. In the next five years, RISC-V will reach a turning point of rapid development.
Meidi: In promoting international collaborative development, our positioning is to become a “global promoter of RISC-V AI acceleration,” contributing patents for technologies that collaborate NPU with RISC-V to promote the formation of a globally unified acceleration interface standard. The key to globalization is “ecosystem interconnection,” and we will collaborate with cloud service providers and upstream and downstream manufacturers to make NPU cards more easily accessible to international cloud platforms and various edge computing systems, allowing global users to experience RISC-V AI capabilities through “computing power as a service.”
Through our tripartite cooperation, everyone will soon see the differences from before, because RISC-V provides a new development path, and the space for imagination will be very large in the future. (Reported by: Ban Yue Tan reporter Gao Shaohua)