By Ian Ferguson, Vice President of Business Development at SiFive
When I joined SiFive in early 2024, my initial focus (which later expanded) was to explore how to drive broader adoption of SiFive’s RISC-V technology in data center system-on-chip components. Introducing new technologies and replacing long-standing dominant vendors is not a task that can be accomplished in just a few quarters; such plans often take years to truly materialize. I have firsthand experience: back in early 2008, I, along with a few colleagues (internally referred to as “mavericks,” but we preferred the term “visionaries”), initiated a plan to push Arm into the server market.
After joining SiFive, I quickly realized that our CPU roadmap would eventually catch up with existing vendors’ products in terms of single-thread performance. However, to truly open this market to a broader customer base, not just a couple of early innovators, we needed to address three additional aspects.
In this article, I will first explore the first aspect: how to empower the software developer community. As for the other two aspects, I will hold off on discussing them for now and will cover them in my subsequent articles.
Three Numbers
90
4
12,800
What do these numbers represent? Currently, forecasts show that NVIDIA holds 90% of the GPU-based neural network training market. They have over 4 million developers. Additionally, an average of 12,800 lines of code are added, modified, or deleted in the Linux kernel every day.
Some say “hardware is cool again,” but ultimately, without strong software support, the cost and difficulty for enterprises to adopt new hardware technologies remain too high.
In May of this year, Red Hat announced the release of the Red Hat Enterprise Linux (RHEL) developer version for SiFive’s latest RISC-V development board, the HiFive Premier P550. Furthermore, they opened the RISC-V source code to the CentOS community.
In July, NVIDIA announced that it is porting CUDA to RISC-V, starting with the HiFive Premier P550. Although they have not yet announced a timeline for code availability, this news has generated significant attention among media, customers, and competitors.
I can only share publicly available information at this time. A brilliant analysis by Joe Byrne provides useful background. As Joe wrote: “NVIDIA is positioning RISC-V alongside Arm and x86 as a supported architecture—this means that once the code is available, enterprises will be able to choose RISC-V CPUs in conjunction with NVIDIA GPGPUs.”
RISC-V International has also just released a blog based on their conversation with NVIDIA’s Frans Sijstermans, sharing this important news announced at the RISC-V China Summit.
Common Themes from Red Hat and NVIDIA
In my opinion, there are three common themes in the announcements from Red Hat and NVIDIA:
Future-Oriented: Both companies are preparing for the future widespread deployment of RISC-V server hardware. They want to be ready ahead of time.
Preferred Platform: Both companies are starting their initial work with the HiFive Premier P550. This is due to the higher performance and stability of the HiFive Premier P550 compared to other RISC-V development boards, as well as the excellent work of the SiFive engineering team on upstream open-source code, in addition to the performance and scalability of the hardware itself. This powerful chip capability allows many developers to “experience” RISC-V in new ways.
RVA23 Milestone: The formal approval of the RVA23 profile has generated significant momentum. Major ecosystem players want to target a platform supported by multiple vendors with a consistent processor architecture. A reliable and universal instruction set that software can depend on is key to achieving this goal.
At the same time, we must also recognize Canonical’s pioneering contributions to the RISC-V ecosystem, making Ubuntu a first-class citizen of RISC-V.
The combined efforts of these industry giants, along with the support of many companies participating in the RISE project, are driving a reality where customers will be able to freely choose from three processor architectures. The barriers faced by system builders, software developers, and component suppliers are being gradually eliminated almost every day.
The uniqueness of RISC-V lies in its openness. Vendors can develop chips for narrow and highly specialized vertical markets. NVIDIA clearly sees the opportunity to extend CUDA into new application areas—something that is difficult for other commercialized instruction set architectures (ISAs) designed for broad general markets. The powerful capabilities of CUDA combined with the limitless future of RISC-V are indeed exciting.
SiFive recently celebrated its tenth anniversary, and we will continue to push the limits of RISC-V. As always, we want to hear your thoughts, your innovations, and the challenges you are facing. In October of this year, SiFive will also participate in the RISC-V Summit held in Santa Clara, looking forward to many exciting talks and discussions. Let’s use this event to expand the dialogue and further accelerate the development of RISC-V.
Ultimately, whether NVIDIA’s choice proves to be correct will depend on the entire RISC-V community.
Source: SiFive
