As transistor sizes approach the nanoscale and even atomic scale, 3D stacking has become a key factor driving the development of the semiconductor industry, particularly in high-performance computing and artificial intelligence (AI) applications. However, 3D integration introduces numerous thermal management challenges associated with increased power density and constrained heat dissipation paths, especially through low thermal conductivity interlayer dielectrics and complex interfaces.
W.-Y. Woon et al. from Taiwan Semiconductor Manufacturing Company published a review article in Nature Reviews Electrical Engineering discussing the state-of-the-art thermal management materials, including process compatibility, key integration challenges, and methods that need improvement to enhance thermal transport across interfaces.
Advanced thermal property measurement techniques are also introduced to highlight the demand for non-destructive online measurement. Finally, a roadmap is provided outlining future research directions for material growth, integration, and characterization methods to achieve feasible thermal solutions for 3D integration and beyond.
Thermal management materials for 3D-stacked integrated circuits.
3D堆叠集成电路的热管理材料。
Figure 1: Heat dissipation issues caused by device architecture and system integration.
Figure 2: Integration challenges of thermal management materials.
Figure 3: Working principle of the 3ω method.
Figure 4: Capabilities of thermal characterization techniques.
As transistor sizes approach atomic levels, 3D stacked integrated circuits have become a key technology in the semiconductor industry, but the heat dissipation issues caused by high power density severely limit their performance.
This review points out that materials such as diamond, aluminum nitride (AlN), and silicon carbide (SiC) can achieve efficient thermal management through innovative processes. Among them, polycrystalline diamond films can achieve a thermal conductivity of 1600 W/m·K at low-temperature deposition of 400°C, with a thermal boundary resistance (TBR) of less than 1 m²·K/GW; aluminum nitride films achieve high thermal conductivity of 100 W/m·K through sputtering technology and are compatible with existing semiconductor processes. These materials can be integrated into chip backside power delivery networks (BSPDN), reducing local hotspot temperatures by 30%. This breakthrough provides critical technical support for the stable operation of AI and high-speed computing chips.
A new paradigm of “near-source cooling” is also proposed, promoting the evolution of thermal management materials from packaging level to chip-level integration, providing material solutions for the gigawatt-level power management of next-generation AI chips (such as Alera computing clusters).
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