Optimizing Mobile Device Design and Development Based on Arm Cortex-A78 and Cortex-X1 CPU

Cadence Optimizes Mobile Device Development for Arm Cortex-A78 and Cortex-X1 CPU with Enhanced Digital Full Flow and Verification Suite

Abstract

• Cadence delivers an optimized digital full flow, providing leading PPA solutions for Arm Cortex-A78 and Cortex-X1 CPU

• Cadence’s verification suite and engines assist design engineers of Arm Cortex-A78 and Cortex-X1 CPU to improve verification throughput

Shanghai, China, May 29, 2020—Cadence Design Systems (NASDAQ: CDNS) today announced it will continue to expand its long-term partnership with Arm to assist customers in developing mobile devices based on Arm Cortex-A78 and Cortex-X1 CPU. To promote the adoption of Cortex-A78 and Cortex-X1, Cadence has delivered a comprehensive digital full flow Rapid Application Kit (RAK) to help customers optimize power, performance, and area targets, enhancing overall productivity. Additionally, the Cadence verification suite and engines have also been optimized to support the creation of designs based on Cortex-A78 and Cortex-X1 CPU, providing engineers with higher verification throughput. For more information about Cadence solutions based on Arm, please visit:

www.cadence.com/go/armbasedsolcpus

Digital Full Flow RAK

Cadence’s digital full flow RAK has been finely tuned to support both 7nm and 5nm process nodes simultaneously, achieving optimized power and performance targets. The Cadence RTL-to-GDS complete integrated RAK includes Genus™ synthesis solution, Innovus™ design implementation system, Quantus™ extraction solution, Tempus™ timing signoff and ECO solution, as well as Voltus™ IC power integrity solution. Key features of the digital full flow include:

• Cadence iSpatial technology unifies the Genus synthesis solution and Innovus design implementation system, achieving higher PPA targets and faster design convergence

• Incentive-driven power optimization from RTL to signoff helps designers achieve lower power for critical load patterns

• Cadence’s unique data model integrates design implementation, timing signoff, and IR drop signoff engines, synchronously achieving power integrity and timing signoff convergence, which is key for design in 5nm and 7nm advanced process node environments

For more information about Cadence’s digital full flow, please visit:

www.cadence.com/go/digitalffcpus

Verification Suite and Core Engine

The powerful combination of Cadence’s verification suite and engines has been further optimized to support designs based on Arm Cortex-A78 and Cortex-X1 CPU, significantly improving verification throughput. The verification suite optimized for Cortex-A78 and Cortex-X1 CPU includes the Cadence Xcelium™ logic simulation platform, Palladium® Z1 enterprise hardware simulation platform, JasperGold® formal verification platform, vManager™ planning and management solution, and Cadence Arm AMBA® VIP, which includes ACE and CHI-D CIP as well as Perspec™ system verification tools.

Some key technologies supporting Cortex-A78 and Cortex-X1 development include: JasperGold formal property verification (FPV) and sequential circuit equivalence checking (SEC) applications that have been used for lock-step verification, enabling multi-core checks with satisfactory results. Additionally, the dynamic engine of the verification suite has been used by multiple customers for verification and early software development.

For more information about Cadence’s verification suite, please visit:

www.cadence.com/go/verificationcpus

“Through our long-term collaboration with Cadence, we can help customers achieve higher performance, efficiency, and scalability, ultimately creating differentiated mobile products,” said Paul Williamson, Vice President and General Manager of Arm’s Customer Business Line. “Cadence’s digital full flow RAK and verification suite and engines provide the foundation for our collaborative customers to build the next generation of mobile products using Cortex-A78 and Cortex-X1 CPU, enabling them to lead the transformation of smartphone experiences in the 5G era.”

“We have been working closely with Arm to ensure that Cadence’s digital full flow RAK and verification suite and core engines can optimize designs based on Cortex-A78 and Cortex-X1 CPU,” said Nimish Modi, Senior Vice President of Marketing and Business Development at Cadence. “Customers face immense pressure to deliver innovative mobile technologies within limited timeframes, and our collaboration with Arm ensures that customers can adopt Cortex-A78 and Cortex-X1 CPU designs faster while meeting expected product goals and quality.”