MediaTek has officially announced that its first flagship System on Chip (SoC) utilizing TSMC’s 2nm process has successfully completed the design tape-out, making it one of the first companies to adopt this technology, with an expected launch by the end of 2026.
It has been revealed that TSMC’s 2nm process technology first employs a nanosheet transistor structure that offers superior performance, power consumption, and yield. Compared to the existing N3E process, TSMC’s enhanced 2nm process increases logic density by 1.2 times, achieves performance improvements of up to 18% at the same power consumption, and reduces power consumption by approximately 36% at the same speed.
According to industry experts, TSMC’s 2nm process, which introduces a GAA transistor architecture, maintains the same number of EUV lithography layers as the 3nm process, making its cost structure more attractive. As a result, it is more favored by customers, with demand for 2nm exceeding that for 3nm. In addition to MediaTek, Qualcomm is also set to launch its next-generation flagship SoC using TSMC’s 2nm process next year. Apple’s upcoming iPhone 18 series will feature the A20 chip, which will also utilize TSMC’s latest 2nm technology, along with AMD’s Zen 6 CPU.
Supply chain sources indicate that TSMC is currently accelerating the construction of its 2nm production line, with expectations to produce 100,000 wafers per month by next year.