Intel’s foundry business is facing a critical turning point. Company executives have publicly stated that the ability to continue advancing to the 14A and more advanced process nodes depends on securing sufficient external customer orders. Without substantial partners, related R&D and capital expenditures may have to slow down or even be shelved. This reflects the real pressure Intel faces in the foundry sector: relying solely on internal product consumption is insufficient to support the high costs of process iteration, and to be competitive in foundry, it must win support from large-scale customers.
Against this backdrop, a now-deleted official video from Intel has drawn industry attention. The video featured a reference SoC named “Deer Creek Falls,” manufactured using Intel’s 18A process and based on the Arm AArch64 architecture, rather than the traditional x86. Its design includes two PCIe controllers, four memory channels, and a CPU cluster composed of three tiers: 4 energy-efficient cores, 2 power-optimized cores, and 1 high-performance core. This “big.LITTLE” core combination is similar to mainstream Arm SoCs in the mobile and embedded fields, clearly intended to demonstrate the compatibility and feasibility of Intel’s process for the Arm ecosystem to potential external customers.
For Intel, the purpose of showcasing such a chip is not to launch a new product, but to provide a verifiable reference platform. It proves that on Intel’s 18A process, it is possible not only to tape out complex Arm architecture designs but also to integrate standardized I/O and multi-core heterogeneous architectures. This is more persuasive for customers considering foundry than merely providing a PDK or technical specifications. Traditionally, external design teams have often been questioned about the difficulty of adopting Intel’s processes, especially regarding the adaptation of toolchains and design rules. Through a practically operable SoC, Intel aims to alleviate external customers’ concerns and show them a more direct path to implementation.
It is noteworthy that while Deer Creek Falls uses the 18A process, Intel’s focus for external customers has shifted to 14A. The 18A process currently mainly serves internal CPUs, GPUs, and some existing projects, while 14A is seen as the node truly aimed at the external market. The 14A process technically continues the RibbonFET gate-all-around transistors and PowerVia backside power delivery, and plans to introduce High-NA EUV lithography. Combining these technologies, Intel hopes to achieve competitiveness against TSMC and Samsung in terms of performance, energy efficiency, and transistor density. However, to support such a massive investment, heavyweight customers must secure capacity in advance.
Currently, industry rumors suggest that major customers like Apple and NVIDIA are in discussions with Intel to assess the feasibility of the 14A process. Even if these collaborations are still in the trial production and validation stages, if any of these companies decide to mass-produce on 14A, it would have a significant impact on the prospects of Intel’s foundry business. This would not only provide stable cash flow for its advanced processes but also drive investments in supporting testing and packaging, forming a complete business loop.
Overall, Intel is advancing its advanced nodes through a dual-line strategy: on one hand, showcasing the technical strength and ecosystem compatibility of the 18A node’s reference SoC to the outside world, and on the other hand, fully promoting 14A as the main process for external mass production. For potential customers, the key to judgment lies not only in transistor performance metrics but also in toolchain maturity, IP ecosystem support, and mass production yield. For Intel, the true value of Deer Creek Falls lies not in the chip itself, but in the signal it conveys—Intel is ready to foundry for the Arm ecosystem and is willing to prove this with tangible results.
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