March Technical Progress in RISC-V

RISC-V March Progress Report

Meta is Testing Its First RISC-V Based Chip for AI Training

According to a report by Tom’s Hardware on March 11, 2025, Meta is testing its first AI chip based on the RISC-V architecture for AI training.

Previously, Meta primarily used high-end AI GPUs from NVIDIA, such as the H100 and H200, to train large language models. However, Meta aims to reduce its reliance on these expensive GPUs and has collaborated with Broadcom to design this custom AI training accelerator. Currently, the chip has completed its first sample production at TSMC and is undergoing limited deployment to evaluate its performance.

This chip may adopt an architecture similar to a systolic array, designed to optimize matrix and vector computations to enhance AI training efficiency. If the test results are satisfactory, Meta may scale up production and gradually reduce its dependence on NVIDIA GPUs.

It is worth noting that Meta previously faced challenges with the Meta Training and Inference Accelerator (MTIA) project, where earlier inference processors failed to meet expected performance and power consumption targets, leading to the project’s discontinuation. Therefore, this testing of the RISC-V based chip is significant for Meta’s independent research and development in AI hardware.

Source:

https://www.tomshardware.com/tech-industry/artificial-intelligence/meta-is-reportedly-testing-its-first-rsic-v-based-ai-chip-for-ai-training

Author: Huang Zhibo

Linux Kernel to Support ESWIN EIC7700 SoC and SiFive HiFive Premier P550 Development Board

The Linux kernel has added patches to support the ESWIN EIC7700 RISC-V SoC, which integrates four 1.4GHz P550 RISC-V cores, a DNN accelerator rated at 13.3TOPS @ INT8, and up to 32GB of LPDDR4/5 memory, used by the well-known SiFive HiFive Premier P550 development board.

This set of patches includes a basic device tree, enabling the ESWIN EIC7700 RISC-V SoC with a quad-core SiFive P550 CPU to boot the mainline Linux kernel.

Link:

https://www.phoronix.com/news/Linux-Patches-EIC7700-HiFive

Author: Xue Songtao

Chimera Linux Discontinues Support for RISC-V

Chimera Linux is a distribution aimed at simplifying system configuration complexity while retaining and extending the flexibility of general Linux systems. It uses musl as its C library implementation, user space tools from FreeBSD, and dinit for the initialization system. In terms of package management, Chimera Linux borrows Alpine Linux’s apk-tools but uses its own package build system. The distribution supports multiple architectures, including x86-64, aarch64, ppc64le, ppc64, PowerPC, and RISC-V.

However, the Chimera Linux team recently announced that it will temporarily discontinue support for the RISC-V architecture for the following reasons:

Insufficient hardware performance: The existing RISC-V hardware does not meet the build requirements. For example, the performance of the SiFive HiFive Unmatched development board is only comparable to that of the Raspberry Pi 3, which is inadequate for the build process.

Difficulty in hardware acquisition: Higher-performance RISC-V development boards, such as the Milk-V Pioneer, face issues with acquisition difficulty, instability, and limited support, making them unsuitable for building.

Limitations of emulated builds: Due to the lack of suitable hardware, Chimera Linux has relied on QEMU-user binfmt emulation on x86_64 machines for RISC-V builds, but this method suffers from reliability issues, poor performance, and high power consumption. Nevertheless, the Chimera Linux team stated that they would reconsider support for the architecture if sufficiently performant and available RISC-V hardware emerges in the future.

Source:

https://chimera-linux.org/news/2025/03/dropping-riscv.html

Author: Huang Zhibo

MIPS Releases Recent Security Architecture Work Results

This document outlines an overall solution for securely partitioning workloads on RISC-V platforms, based on the following:

  • Publicly released v0.4 specification under WorldGuard

  • TrustZone® interoperability

  • ePMP of the RISC-V privilege specification

  • IOPMP of the v0.7 specification

Additionally, the document proposes modifications to the last publicly released version of WorldGuard, suggesting making “TrustZonify” and “Hypervisorify” configurable from the outside.

Link:

https://github.com/MIPS/riscv-partitioning/releases/download/v0.6.2/riscv-partitioning-v0.6.2.pdf

Author: Xue Songtao

Progress in RISC-V Ecosystem Support

QEMU Adds RV IOPMP Support

Link:

https://lists.nongnu.org/archive/html/qemu-devel/2025-03/msg03531.html

LLVM Adds Calling Convention for RVV VLS

Link:

https://github.com/llvm/llvm-project/commit/c804e86f558a42f328946331af391d700747fa90

Author: Xu Kailiang

Linux 6.15 Perf Tooling Introduces New Support for Latency Profiling

The Linux 6.15 kernel introduces a new **–latency option** for the performance analysis tool perf, focusing on optimizing system execution latency. Unlike traditional CPU time analysis, this feature tracks context switches and parallel execution, weighting samples to reflect the code’s impact on actual wall-clock time.

Implementation mechanism: During the perf record phase, context switch events are collected, recording the scheduling state of processes/threads. In the perf report phase, scheduler information is combined to calculate the number of parallel executing threads at each point in time, and the sample weight is divided by this value.

Technical highlights and limitations

Highlights: This is the first implementation of scheduling event-based latency modeling in mainstream performance tools, filling a gap in latency analysis in multi-core environments. It provides an intuitive weight adjustment mechanism, allowing developers to avoid manually correlating context switch data.

Current limitations: It only supports process-level analysis and does not yet offer system-wide latency tracking.

Users need to actively select the –latency mode; the default remains CPU time analysis, requiring developers to understand the differences between the two modes.

Link:

https://www.phoronix.com/news/Linux-6.15-Perf-Tools-Latency

Author: Wei Zhixiang

Many Rust Changes Submitted for Linux 6.15

The Rust support in the Linux 6.15 kernel has received several important updates, marking the gradual maturation of Rust in the kernel ecosystem, with new module extensions: the addition of HRTIMER (high-resolution timer) and DMA (direct memory access) modules, enriching the functionality of the Rust kernel library (kernel crate).

The first Rust graphics driver framework: Early code from the NOVA core driver has been merged through the DRM subsystem, marking the first open-source NVIDIA kernel-level graphics/display driver written in Rust, providing experimental support for future Rust applications at the hardware interaction layer.

Linus Torvalds’ adaptation process: Linus faced challenges merging Rust code due to unfamiliarity with language features (such as pin::Pin and core library dependencies), relying on community-provided examples as “training tools,” highlighting the learning curve of Rust’s gradual integration into the kernel.

Maturity limitations: The NOVA driver is still in the early prototype stage, with incomplete functionality requiring long-term iteration. Some Rust features (such as asynchronous programming) still need exploration for implementation in the kernel.

Submodule ecosystem expansion: Plans are underway to establish independently maintained Rust submodules for different functional domains (such as network protocol stacks and file systems) to reduce code coupling.

Link:

https://www.phoronix.com/news/Linux-6.15-Rust

Author: Wei Zhixiang

Ubuntu’s Four-Year Performance Evolution Assessment on RISC-V Platform

Phoronix recently conducted an assessment of Ubuntu’s performance evolution on the RISC-V architecture, covering Ubuntu 20.04 LTS, 22.04 LTS, and the latest development version. The tests evaluated CPU performance through Sysbench and Coremark, memory bandwidth through STREAM tests, disk read/write capabilities through FIO, and compilation efficiency through Linux kernel compilation tests. The results show that as system versions have been updated, the overall performance of the RISC-V platform has steadily improved: Ubuntu 24.04 shows approximately a 15% improvement in CPU performance compared to 20.04, with compilation time reduced by about 10%; while memory and storage performance have improved, they still lag behind x86. Overall, Ubuntu is gradually achieving higher performance optimization and broader compatibility support on the RISC-V platform.

Link:

https://www.phoronix.com/review/ubuntu-riscv-4years

Author: Wang Yuan

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