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Recently, foreign media reported that MIPS Technologies announced it would abandon the design of the MIPS instruction set and shift to RISC-V. In response, Tieliu couldn’t help but sigh, “Forty years east of the river, forty years west of the river“. MIPS, as the first commercially available RISC instruction set, has been abandoned by the company after forty years, turning to embrace the rising star RISC-V. Looking back at MIPS’s history over the past forty years, the key to its success or failure lies in whether it can seize opportunities. MIPS seized the opportunity of the rise of RISC processors but failed to grasp two subsequent historical opportunities.
MIPSrose by seizing the opportunity of the RISC processor’s rise
Half a century ago, the global CPU market was dominated by CISC processors, until the RISC processors emerged. Due to the performance advantages of RISC processors over CISC processors, Intel found itself at a disadvantage in market competition, having to bet on both sides, maintaining both CISC and RISC product lines, leading to the deep-rooted belief in “RISC advantages.” Even now, although CISC and RISC have converged, many in the industry understand this, yet many media outlets continue to promote the “inherent advantages” of RISC.
In this wave of RISC processors, MIPS was undoubtedly a pioneer. In 1981, Stanford professor John Hennessy founded the MIPS processor and established MIPS Technologies in 1984. In 1992, MIPS was acquired by SGI, and in 1998, MIPS was spun off from SGI to go public again. From its founding until its sale to SGI, MIPS designed products such as R2000, R3000, and R4000, among which were commercially successful products, with companies like SGI and Sony being major clients.
Even as MIPS gradually faded, it still had strong competitiveness in some markets, such as Cavium, which focused on custom network device processors based on MIPS. The CN6xxx series once dominated the network device market, with a series of loyal customers including MIPS, Cisco, Ubnt, Broadcom, and Mobileye. According to data released by MIPS in 2018, the historical cumulative shipment of MIPS chips has exceeded 10 billion, with an annual addition of 1 billion, indicating a significant market scale.
MIPSgradually marginalized due to two competitive failures
The first failure was during the competition between RISC and CISC processors. At that time, although Intel faced significant challenges from MIPS, Alpha, Sparc, Power, and PA-RISC RISC processors, it did not sit idly by. Instead, it borrowed the advantages of RISC processors to achieve a transformation of CISC in the decoding stage, compensating for the disadvantages of CISC in pipeline implementation.
It should be noted that while CISC borrowed advantages from RISC, RISC also borrowed from CISC. For instance, ARM borrowed from CISC to improve instruction cache efficiency, leading to the convergence of CISC and RISC. Years ago, a research group from the University of Wisconsin reported at the International Symposium on Computer Architecture that the differences between CISC and RISC at the instruction set architecture level had become minimal, and the essence of both had merged, with performance improvements from microarchitecture and physical design overshadowing instruction set differences. This report faced criticism from some scholars not because of its content but because they believed it was already a consensus in academia, and there was no need to waste time on well-known conclusions at top academic conferences.
While borrowing from RISC, Intel also fully utilized its market share advantage and insisted on backward compatibility, developing more cost-effective products through a mature horizontal integration business model, thereby squeezing the market share of RISC processors. Later, it formed the Wintel alliance with Microsoft, establishing its dominant position through the bundling of software and hardware.
In this wave of death competition, HP abandoned PA-RISC and turned to the X86 camp; IBM managed to maintain its Power processors with government, banking, and military clients who had deep pockets, but in 2016, IBM sold its Power8 processors to Suzhou Hongxin, and in 2018, Hongxin faced a wage dispute. DEC (which developed the Alpha processor) and Sun (which developed the Sparc processor) collapsed. DEC was first acquired by Compaq and later buried by HP, with some of its legacy assets flowing to Intel, while Sun’s legacy was acquired by Oracle. Years ago, Oracle even sued Google over the Java assets acquired from Sun, claiming damages of up to $9.3 billion. In this wave, MIPS could not remain unscathed, being pressed by Intel in the desktop market and seeking a foothold in the communications industry.
The second failure of MIPS was its inability to seize the opportunity presented by the rise of smart mobile devices. At that time, in terms of industry status, MIPS was slightly ahead of ARM. Companies like Texas Instruments and Freescale (when Texas Instruments was still a leading enterprise, and Qualcomm and MediaTek were relatively minor players; Apple and Huawei had not yet begun designing mobile chips) had provided clients with mobile chips based on both MIPS and ARM. However, major companies like Nokia, Samsung, and Apple favored ARM, and MIPS’s insistence on competing head-on with Intel led to its precarious position. Meanwhile, ARM, with its deep roots in embedded chips, seized the opportunity of the era and rapidly rose in the past decade.
Multiple Sales Have Severely Weakened MIPS
In 2013, the UK company Imagination acquired the declining MIPS for $60 million. In this acquisition, MIPS sold 498 patents for $350 million to Bridge Crossing LLC. After the acquisition, Imagination formed three main businesses: PowerVR GPU, MIPS CPU, and communication and wireless connection products. However, the MIPS CPU did not bring significant revenue to Imagination, which relied heavily on its GPU business. As a result, Imagination did not invest much in the development of MIPS processors, instead utilizing MIPS‘s past achievements to make profits, leading to a near halt in the development of MIPS processors.
In 2017, after Apple failed to acquire Imagination, it announced the discontinuation of PowerVR GPU, opting for in-house GPU development. Following Apple’s announcement, Imagination‘s stock price fell by 70%. In the face of this crisis, Imagination had to bring in a white knightâCanyon Bridge, a company with Chinese capital background. Due to Canyon Bridge’s Chinese background and the close ties of many MIPS businesses to the US military, the acquisition required divestment from the US investment firm Tallwood. Later, Wave Computing acquired MIPS from Tallwood. Wave Computing, a startup focused on artificial intelligence, initially planned to apply MIPS in the AI field, but everything fell apart with Wave Computing’s bankruptcy.
After the bankruptcy restructuring of Wave Computing, the company was renamed MIPS Technologies and abandoned the development of MIPS processors, shifting its focus to the RISC-V camp. Given MIPS’s historical position, its entry into RISC-V is not insignificant; it is akin to a once-sovereign ruler bowing to a rising power, which is quite symbolic.
MIPS’ Rise and Fall: Lessons for China
MIPS has gradually been marginalized in the market, largely due to its fragmented ecosystem. With a strong academic influence, MIPS was relatively open in technology licensing, allowing clients to add instruction sets and design their own CPU cores. This technical openness made MIPS popular in academic circles, with many universities still using MIPS for teaching. However, the freedom for clients to add instruction sets directly led to the fragmentation of the MIPS ecosystem.
In contrast, ARM is commercially open but technically strict. During the ARM32 era, ARM only licensed the ARM32 instruction set to a maximum of five companies, including Apple and Qualcomm, prohibiting clients from modifying or adding instructions. All other licenses were for IP cores. Indeed, while ARM64 is much more open in licensing, it still prohibits modifications and additions, with exceptionally high prices. One domestic company faced licensing fees of $100 million every five years, with renegotiations upon expiration, and strict clauses prohibiting modifications and additions, limiting it to server applications. Some star enterprises that have more funding secured higher licensing levels, but they also paid significantly more. It can be said that ARM is more conservative in technology licensing than MIPS, but precisely this conservative approach, such as prohibiting client modifications and additions, has helped ARM avoid the fragmented ecosystem fate of MIPS.
In recent years, domestic CPUs have shown a blossoming trend, with various instruction sets emerging, including X86, ARM, MIPS, SPARC, RISC-V, and SW64. Among them, SW64 is a self-developed instruction set by Shenwei, while Loongson’s 3A4000 used the LoongISA based on MIPS prior to 3A5000, which is based on its own instruction set, LoongArch. RISC-V is an open-source instruction set originating from a US university project, controlled by the RISC-V Foundation, which is predominantly white. Companies like Lattice and Zhaoxin are based on X86 licensing, while Huawei, Feiteng, and Spreadtrum, as well as the now-defunct Huaxintong, are based on ARM licensing. Hongxin and Inspur have successively partnered with IBM to join the Power camp. Both Intel and IBM are American companies, and ARM’s key R&D center is located in Austin, Texas, and may be acquired by Nvidia, becoming a thoroughly American company. In the current international environment, relying heavily on American company licenses is very risky. This is not alarmism but a real risk. Due to a certain company’s reliance on ARM licensing in design and TSMC processes in manufacturing, its ARM CPU has been “discontinued” after US sanctions.
Under policy guidance, domestic replacement projects are being vigorously promoted, but a series of problems have arisen in practice, the most troublesome of which is software ecosystem development. During software porting and adaptation, due to the different instruction sets of various domestic CPUs, software must be adapted to multiple versions, leading to redundant development and doubling the workload for software porting. Given that this is a niche market, the heavy workload for porting has led many software vendors to adopt a perfunctory attitude, merely completing political tasks, resulting in ported software that lacks the experience and functionality of Intel platforms, often experiencing inexplicable lag, whereas even years-old Celeron + Windows platforms run smoothly.
Back then, MIPS suffered from the consequences of a non-standard and fragmented ecosystem, and now many nascent domestic CPUs are falling into the same trap. Based on top-level design for internal circulation, it is entirely possible to enforce unified standards, creating a set of self-developed instruction sets for domestic CPU companies to design their CPUs based on this set of instruction sets, using whichever is more effective. This approach has the additional benefit that once a self-developed instruction set is adopted, foreign companies cannot acquire CPUs designed based on that instruction set, revealing the true self-developed CPUs and allowing them to enjoy national policy benefits, completely eliminating the possibility of pseudo-native CPUs siphoning off policy benefits. Software vendors could also adapt only one version of software, allowing them more time and energy for software optimization. Only by working together can the domestic independent software and hardware technology system be initially formed in the shortest time.
Indeed, while MIPS is now on the decline, it was once a pioneer in the commercial RISC instruction set and still maintains a considerable market share. Due to its early start and strong academic influence, it has a wide impact, with many large American companies such as Broadcom, Mobileye, and Taiwan’s MediaTek still using MIPS for business and teaching.
In terms of industry status, although it cannot be compared with X86 and ARM, according to data released by MIPS in 2018, the historical cumulative shipment of MIPS chips has exceeded 10 billion, a level of influence and industry status that is difficult for any processor other than X86 and ARM to surpass.
MIPS and RISC-V have deep connections, both being very academic and allowing for the free addition of instructions. As many commercial companies and research institutions worldwide join the RISC-V camp, how to avoid the “nine dragons controlling the water” scenario that leads to software ecosystem fragmentation is a pressing issue for RISC-V. For Chinese CPU companies, how to unify standards, avoid internal friction, and work towards a common goal is a crucial issue that requires careful consideration.