Course Preview is about to start☟
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February 22, 2020, 7 PM
QQ Group Video Live Broadcast
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Both Bachelor’s and Master’s degrees from Fudan University in Microelectronics. Has been engaged in digital integrated circuit design and verification for many years. Familiar with the entire process of digital circuits, with multiple tapeout project experiences.
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Course Requirements
All required software is available on the server, as long as you have internet and a computer at home.
↓ Overall Course Introduction ↓
Fundamentals of Digital Circuit Design — From Verilog to Tapeout
1、Introduction to Digital Circuit Design Process
2、Basics of Verilog HDL and Design of Synthesizable Code
3、Verilog Implementation of Typical Digital Circuits
4、How to Use Simulation and Debugging Tools for Practical Verilog Exercises
Detailed Course Introduction
The course will cover the specific processes and corresponding tools involved in digital circuit design from algorithms to tapeout, as well as what each process entails, how to operate it, and why this process is necessary. In this course,part of it will explain basic knowledge, including the basics and syntax of Verilog HDL, various synthesizable coding styles, code applied in verification environments, and the design of common digital circuit paths.The other part will involve hands-on practice after mastering the basic Verilog HDL knowledge, training everyone to complete some common digital circuit designs, learn how to write practical digital circuit modules, and how to use EDA tools for simulation, discovering problems, and how to debug using EDA tools.Finally, the completed design code will be synthesized, timed analysis, and post-simulation.This will enable students to independently complete the entire digital design process, except for the backend.
This course is primarily practical, and the knowledge introduced is generally what is needed in actual work. This course can guide everyone into the industry of digital circuit design, helping them transition from basic theoretical knowledge such as digital logic circuits and principles of digital integrated circuit design to practical design. The course combines theory and practical operation, explaining certain basic principles, and reinforcing various basic knowledge through numerous examples and hands-on practice. It will also practically explain how to apply the Verilog-designed code to the chips.
The course consists of approximately30 class hours. Among them, 10 hours are for explaining the basics of Verilog language, 10 hours for practical exercises in Verilog, and 10 hours for explaining the subsequent synthesis, formal verification, and static timing analysis of the design code.
After completing this course, interview questions related to digital design will be easily manageable. Last year, a session of this course was held, and this session is an upgraded version of last year’s course, adding about 40% more enhanced content.
The effectiveness of last year’s course was, without exaggeration, very good.
Course Resources☟
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Target Audience
1. Interested in Verilog but struggling to get started. Have learned various fragmented theoretical knowledge of digital circuits but cannot piece them into a system, and don’t know how to apply them to actual tapeout.
2. Graduate students nearing graduation but lack tapeout experience, have insufficient understanding of digital circuits, yet are facing job hunting.
3. Non-major but interested in digital circuit design, wishing to transition into digital circuit design.
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Tuition:2000
1. Students of Fei Jie can enjoy15% discount
2. Those who registered for last year’s live course can enjoy50% discount
3. Those who registered for this platform’s recorded course can enjoy10% discount
ps: If multiple conditions are met, the discounts will be fully enjoyed. For example, if both 1 and 2 are met, the discount will be 42.5%. Those who have purchased this recorded course in EETOP’s Chuangxin Lecture Hall can enjoy a 10% discount; specific inquiries can be made to the relevant person in charge at EETOP’s Chuangxin Lecture Hall.
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Preview Fee:200
If not satisfied after the preview, those who do not participate in the subsequent courses will receive a full refund.
Purchase Method:Link
https://appwjeaxhvz6976.h5.xiaoeknow.com/v1/course/column/p_5e460d8a6336f_jANQGCFN?type=3
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