FPGA Parallel Programming – Implementing Digital Signal Processing with HLS

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There are few books introducing HLS in China, and we hope to translate Parallel Programming for FPGAs to help more people understand HLS and FPGA development.

FPGA Parallel Programming - Implementing Digital Signal Processing with HLS

Main Text
Chapter Zero: Preface
Chapter One: Introduction
Chapter Two: FIR Filter
Chapter Three: CORDIC
Chapter Four: Discrete Fourier Transform
Chapter Five: Fast Fourier Transform
Chapter Six: Sparse Matrix-Vector Multiplication
Chapter Seven: Matrix Multiplication
Chapter Eight: Prefix Sum and Histogram
Chapter Nine: Video Systems
Chapter Ten: Sorting Algorithms
Chapter Eleven: Huffman Sorting
Using FPGA for algorithm acceleration and implementation is widely recognized, but for many developers without FPGA and HDL design experience, the development threshold often seems high. Therefore, researchers and engineers worldwide are committed to introducing FPGA technology to more developers, enabling them to benefit from the parallelism, high performance, low power consumption, and flexible configuration of FPGA. Among them, Vivado HLS (High-Level Synthesis) is a successful representative. Through the Vivado HLS tool, developers can program FPGA using C/C++ languages. This technology has matured and is widely adopted in the engineering practices of Xilinx customers.
For this reason, Xilinx Research Institute has been considering how to better introduce HLS technology to the academic community, helping those familiar with FPGA development to improve their development efficiency, and helping those unfamiliar with FPGA development to quickly get started with FPGA algorithm implementation. This time, Xilinx chief engineer Steve collaborated with Professor Ryan Kastner’s team at UCSD to launch this e-book, which introduces the process of quickly implementing high-performance FPGA designs using HLS tools and C/C++ languages through 10 algorithm implementation cases. Upon seeing this e-book, I immediately felt this was the content I was looking for. This book, through years of engineering, research, and teaching experience, introduces the HLS implementation methods, hardware design considerations, and system optimizations in an easy-to-understand manner.
Therefore, shortly after the book was launched, we initiated a volunteer translation activity in the FPGA technical group, and on the same day received support from the translators Cao Yue, Wu Yanbei, Hu Bo, Wang Zhibin, and Yang Yong. Meanwhile, Xilinx intern Hu Chenglong served as the translation project manager, leading volunteers to start collaborative translation work through the Github platform, and deploying the electronic version in the form of a blog on GitHub Page and Gitbook. Xilinx interns Li Yanye and Chen Wen also completed part of the translation and review work, as well as the entire engineering implementation. Everyone is eager to quickly introduce this book to domestic readers. Utilizing their spare time, they completed the translation, initial proofreading, and the goal of full engineering implementation of this book within just two months. The engineering implementation of this book also has certain characteristics; the relevant project not only implements algorithm parallel programming but also utilizes the Pynq framework to visualize the algorithm implementation process on Pynq-Z2 using Python, which is an enhancement compared to the original English version.
We believe that through reading this book, more people can understand, try, and enjoy FPGA development. This book is just a start, and we also welcome more enthusiasts to join us in expanding the application scenarios of HLS and passing on knowledge. If you have any questions or suggestions, please contact me at [email protected].
Lu Jiahua
Link:https://pan.baidu.com/s/1lLQB1T678uzyWWj0eD4SpQ&shfl=shareset Extraction Code: ny95
FPGA Parallel Programming - Implementing Digital Signal Processing with HLS

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FPGA Parallel Programming - Implementing Digital Signal Processing with HLS

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FPGA Parallel Programming - Implementing Digital Signal Processing with HLS

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FPGA Parallel Programming - Implementing Digital Signal Processing with HLS

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FPGA Parallel Programming - Implementing Digital Signal Processing with HLS

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