Exploring ARM: Understanding the Instruction Set of ARM Cortex-M

Introduction

I have been involved in embedded software development for nearly five years, primarily using microcontrollers from the ARM Cortex M core series. During these five years, I have been grateful for the existence of C language compilers, which allowed me to develop without needing to touch assembly language. However, it seems I have missed out on some beautiful vistas, not experiencing the beauty of compilers and CPUs. Therefore, I decided to explore the wonderful ARM CPU architecture and the secrets of C language compilers during my boring weekends by researching materials, conducting experiments, and drawing conclusions. (Because I personally disagree with the teaching methods of microcomputer principles courses in schools).

  • Exploring ARM | 1. Understanding the ARM Cortex-M Family

1. ARM Instruction Set Architecture

The ARM instruction set architecture, abbreviated as ISA, supports three instruction sets: A64, A32, and T32.

  • The A64 instruction set is used in Armv8-A to support 64-bit architecture
  • The A32 instruction set is referred to as the ARM instruction set in Armv6 and Armv7 architectures
  • The T32 instruction set is known as the Thumb instruction set in Armv6 and Armv7 architectures
Exploring ARM: Understanding the Instruction Set of ARM Cortex-M

A32 Instruction Set

The A32 instruction set, before armv8, is also known as “ARM instruction set, with a fixed instruction length of 32 bits and 4-byte alignment”.

T32 Instruction Set

The T32 instruction set, before armv8, is referred to as the Thumb instruction set.

Initially, the ARM instruction set had a fixed length of 32 bits. To improve the code density of user code, “the Thumb instruction set was designed as a 16-bit instruction set”, allowing developers to use both the ARM instruction set and Thumb instruction set to reduce code size. However, these are two distinct instruction sets with two operational states, requiring cumbersome switching between ARM and Thumb states.

Over time and with the introduction of Thumb-2 technology, “most functionalities of the ARM instruction set have been incorporated into Thumb instructions as a supplement to the Thumb instruction set, evolving the Thumb instruction set into a mixed-length instruction set of 16 and 32 bits, known as the Thumb-2 instruction set”.

The emergence of the Thumb-2 instruction set allows compilers to balance performance and code size within a single instruction set, providing excellent code density and minimizing system memory size and cost.

2. ARM Architecture Extensions

ARM also provides a series of architecture extensions to meet the needs of the next generation of processors, offering new functionalities for ARM processors. Exploring ARM: Understanding the Instruction Set of ARM Cortex-M

DSP Extension

The DSP for Cortex-M provides high-performance “signal processing capabilities” for ARM Cortex-M processors, applicable in scenarios such as audio, sound, sensor hubs, and machine learning, without the need for additional DSP devices to perform signal processing tasks.

Processors with DSP extensions include Cortex-M4, Cortex-M7, Cortex-M33, Cortex-M35P, and Cortex-M55 processors.

The DSP extension instructions are added to the Thumb instruction set and optional floating-point units, ensuring ease of use for the original Cortex-M programming model while adding digital signal processing capabilities.

SIMD Instructions

These Cortex-M processors with DSP extensions also offer “SIMD instructions” to operate on 8-bit or 16-bit integers.

SIMD stands for single instruction multiple data, allowing “SIMD instructions to operate on two 16-bit values or four 8-bit values simultaneously”, while all registers remain 32 bits. Exploring ARM: Understanding the Instruction Set of ARM Cortex-M Instructions operating on 8-bit or 16-bit data are very useful for processing video or audio data, as this data does not require a 32-bit width, and SIMD instructions provide the capability for parallel processing of this data.

Floating Point Unit

The ARM floating point unit technology provides high performance and efficiency hardware support for “half-precision, single-precision, and double-precision floating point operations”.

ARM floating point units use complete software library support and are fully compliant with the IEEE-754 standard, making them particularly suitable for applications requiring high precision in floating-point calculations.

Application scenarios for floating point data types include:

  • Automotive control programs
  • 3D graphics
  • Industrial control systems
  • Motion control systems

Helium

The ARM Helium technology is the M configuration vector extension of the ARM Cortex-M processor series, abbreviated as MVE. This technology is an extension of the Armv8.1-M architecture, providing significant performance improvements for machine learning applications in small embedded devices.

The Cortex-M55 is the first processor to feature this extension.

The Helium technology adds over 150 new scalar and vector instructions, where integer Helium technology enables efficient computation of 8-bit, 16-bit, and 32-bit fixed-point data. The 16-bit and 32-bit fixed-point formats are widely used in traditional signal processing, such as audio processing, while the 8-bit fixed-point format is important in machine learning processing, such as neural network computations and image processing.

Similarly, Helium also supports floating-point data types, including single-precision floating-point (32 bits) and half-precision floating-point (16 bits).

3. What Instruction Set Does Cortex-M Use?

Having discussed the basic instruction set and extended instruction sets of ARM, it’s time to answer our initial question: What instruction set does ARM Cortex-M use?

“The entire ARM Cortex-M series supports only one instruction set: the Thumb instruction set or the Thumb-2 instruction set. To be precise, it supports the T32 instruction set.”

Among the many members of the Cortex-M family, each processor has different support for the Thumb/Thumb-2 instruction set, with “most processors supporting a subset of the Thumb/Thumb-2 instruction set”.

The Thumb instruction set supported by Cortex-M0, Cortex-M3, Cortex-M4, and Cortex-M7 series is shown in the figure. Exploring ARM: Understanding the Instruction Set of ARM Cortex-M The Thumb instructions supported by Cortex-M23 and Cortex-M33 cores are shown in the following figure, with the yellow parts indicating the newly added instructions in the ArmV8-M series:

Exploring ARM: Understanding the Instruction Set of ARM Cortex-M

Thus, the second stop of the ARM exploration journey comes to an end! See you at the next stop!

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