🧠 1. Physical Storage Structure
-
On-Chip Memory
- IRAM (Instruction RAM) 192KB (ESP32 classic version), with the first 64KB fixed for dual-core CPU cache, and the remaining space used for high-speed execution code (such as interrupt functions).
- DRAM (Data RAM) 328KB, used for global variables and stack data. About 64KB will be occupied by the protocol stack when Bluetooth is enabled.
- RTC SRAM 16KB (8KB fast + 8KB slow), retains data in deep sleep mode, with power consumption at microamp level.
- ROM (Read-Only Memory) used to store the bootloader and basic drivers, for example, the ESP32-C3 has a built-in 384KB ROM responsible for system startup and core function calls.
- SRAM (Static Random Access Memory)
- eFuse 4Kbit (about 512 bytes), stores the unique ID of the chip, encryption keys, and security configurations.
External Extended Storage
- Flash typically external 4–16MB (SPI interface), stores applications, file systems, and partition tables, supporting XIP (eXecute In Place) technology to run code directly from Flash.
- PSRAM (Pseudo Static RAM) expanded via QSPI bus (up to 8MB), used as data cache. Note: DMA is not supported, access speed is lower than on-chip SRAM.
📂 2. Logical Storage Partitioning (Example with 4MB Flash)
ESP32 manages Flash space through a partition table, with the default partition scheme as follows:
| Partition Name | Start Address | Size | Function Description |
|---|---|---|---|
| Bootloader | 0x1000 | 28KB | Second-stage bootloader |
| Partition Table | 0x8000 | 4KB | Defines the layout of each partition |
| NVS | 0x9000 | 20KB | Stores Wi-Fi configurations, device keys, etc. |
| OTA Data | 0xE000 | 8KB | Records OTA update status and boot partition |
| Factory App | 0x10000 | 1.2MB | Factory firmware (can be replaced by OTA partition) |
| SPIFFS/FATFS | 0x290000 | 1.5MB | File system (stores web pages, logs, etc.) |
Developers can customize partitions by modifying the
<span>partitions.csv</span>file, for example:
- Video devices: increase APP partition to 2MB, reduce file system space.
- Sensor nodes: enable the “Minimal SPIFFS” scheme (1.9MB APP + 170KB SPIFFS).
⚡ 3. Core Features and Development Practices
-
Dual-Core Memory Scheduling PRO CPU and APP CPU share IRAM and DRAM, resource conflicts must be avoided. FreeRTOS task scheduling prioritizes on-chip SRAM, while PSRAM is suitable for storing large non-real-time data (such as image buffers).
-
Low Power Storage Optimization
- In deep sleep, only RTC SRAM remains powered (power consumption ≈ 5μA), suitable for preserving sensor historical data.
- Use
<span>RTC_DATA_ATTR</span>macro to define variables in RTC SRAM, ensuring data is not lost after waking up.
Performance Key Limitations
- IRAM Code can be forced into IRAM for frequently called functions (such as interrupt service) using
<span>IRAM_ATTR</span>, avoiding Flash access delays. - PSRAM Usage prohibits DMA transfers, manual allocation is required via
<span>heap_caps_malloc()</span><code><span> (e.g., </span><code><span>heap_caps_malloc(1024, MALLOC_CAP_SPIRAM)</span>).
Security Mechanisms
- Secure Boot: The partition table includes an MD5 checksum field to prevent tampering.
- Flash Encryption: eFuse controls the AES encryption key to protect firmware and sensitive data.
🔧 4. Model Differences and Selection Recommendations
| Model | Storage Feature Differences | Applicable Scenarios |
|---|---|---|
| ESP32-WROOM | No PSRAM, Flash ≤ 16MB | General IoT devices (smart switches) |
| ESP32-WROVER | Supports 8MB PSRAM | Voice recognition, GUI devices |
| ESP32-C3 | Single-core RISC-V, 384KB ROM + 400KB SRAM | Ultra-low power sensors |
| ESP32-S3 | Supports Octal PSRAM (double speed) | AI edge computing (image classification) |
Development Tip: When enabling Bluetooth, reserve 64KB DRAM for the protocol stack; for video streaming projects, prioritize the WROVER module.
💡 5. Debugging and Troubleshooting
- Memory Overflow Detection Use
<span>heap_caps_get_free_size(MALLOC_CAP_INTERNAL)</span>to monitor the remaining on-chip RAM. - Partition Table Errors If startup fails, check the MD5 checksum result of the partition table in the serial log, or re-flash the partition table.
- PSRAM Initialization Enable
<span>CONFIG_SPIRAM_SUPPORT</span>in<span>sdkconfig</span>, and call<span>psram_init()</span>in the code.
💎 Conclusion
The design of the ESP32 storage system balances flexibility (customizable partitions), performance (dual-core memory management), and security (encrypted boot). Developers need to balance resource allocation based on specific scenarios. Mastering the collaboration mechanism of on-chip and off-chip storage, as well as low-power configuration techniques, is key to unlocking the full potential of the ESP32.