Wang Hong, Pan Anjun, Yang Zhancai, Feng Jinqi, Chen Hongquan, Gao Qian

(Aviation Industry Beijing Great Wall Aerospace Measurement and Control Technology Research Institute, Beijing 101111)

doi: 10.19708/j.ckjs.2022.06.272

Citation format:

Wang Hong, Pan Anjun, Yang Zhancai, et al. Embedded online monitoring technology for foreign avionics systems [J]. Measurement and Control Technology, 2023, 42(1): 1-9.

Abstract

Based on the analysis of the architecture of embedded online monitoring systems and five-level monitoring solutions for foreign avionics systems, this article introduces the development of embedded online monitoring technologies, standards, and development verification tools abroad. It proposes suggestions for the development of an aircraft-level embedded online monitoring system architecture, the development of dedicated monitoring modules, the construction of simulation verification platforms for embedded online monitoring systems, and standardization efforts, hoping to provide guidance and reference for the future development of embedded online monitoring technology for avionics systems in China.

Keywords

Avionics systems; embedded online monitoring; standards; development verification tools

Embedded online monitoring technology for avionics systems refers to the use of advanced embedded testing technologies such as boundary scan devices, intelligent testing chips, smart monitoring instruments, and intelligent diagnostic reasoning to enhance the traditional built-in test (BIT) diagnostic capabilities while the system is running or with minimal disassembly. This technology can independently grasp the current operating state of the system, identify the location and cause of faults, predict anomalies and fault trends, and output information in various forms such as sound, light, and displays, assisting operators and maintenance personnel in taking necessary actions. Practices by foreign military forces have proven that embedded online monitoring is the simplest and most effective technical means to improve the testability, maintainability, and rapid repair capabilities of avionics systems. The embedded online monitoring system is an essential system for the next generation of aviation equipment, serving as a core technology for enhancing traditional BIT capabilities, fault prediction, and the maturation of Prognostics and Health Management (PHM) systems, as well as for autonomous equipment support.

Since the late 1980s when countries in Europe and America began to develop embedded monitoring and diagnostic technologies based on intelligent BIT, there has been extensive innovative research in areas such as boundary scan, embedded communication protocols, embedded monitoring chips, embedded monitoring instruments, and advanced diagnostic reasoning algorithms. These technologies have found significant applications in embedded online monitoring standards, methods, and tools, providing important support for enhancing the testing and diagnostic capabilities of foreign military equipment. Currently, domestic aviation equipment’s embedded online monitoring design generally adopts traditional BIT technology, with intelligent BIT not yet effectively applied, and new embedded online monitoring methods still being in a blank state, showing a significant gap compared to foreign countries. With the continuous application of complex avionics systems such as Very Large Scale Integration (VLSI), multi-core, and System on Chip (SoC) in the future, this paper conducts an in-depth analysis of the recent developments in embedded online monitoring technologies, standards, and development tools abroad. It proposes some development suggestions for domestic embedded online monitoring systems based on foreign development experiences and the actual needs in China, hoping to provide guidance for the design, development, and use of embedded online monitoring systems for avionics systems in the future.

1. Architecture of Foreign Avionics Systems Embedded Online Monitoring

The architecture of foreign avionics systems embedded online monitoring is shown in Figure 1.

Figure 1. Architecture of Foreign Avionics Systems Embedded Online Monitoring

The architecture of foreign avionics systems embedded online monitoring is constructed using a layered, hierarchical monitoring and fusion technical solution, covering all levels of avionics products, such as Shop Replaceable Unit (SRU) level (board level), Line Replaceable Unit (LRU) level, subsystem level, system level, and aircraft level. The structural hierarchy of the embedded online monitoring system for avionics systems includes embedded online monitoring layers at the board level (including various monitoring units), LRU level (including various monitoring controllers), subsystem level, system level, and aircraft level. Among them, the board level and LRU embedded online monitoring layers are applied in physical form to onboard products, while the subsystem level, system level, and aircraft level embedded online monitoring layers can either reside within existing onboard systems or be implemented with an independent controller. The higher-level online monitoring layers are responsible for sending test vectors and control commands to the lower-level online monitoring layers. This level of online monitoring is responsible for reporting all monitoring results from its lower levels to the upper-level online monitoring layer, identifying monitoring results, and eliminating associated faults. Each monitoring unit in the template mainly conducts embedded online monitoring for analog devices, digital circuits, and RF circuits, transmitting monitoring results to the LRU-level online monitoring controller, and then reporting to the upper-level online monitoring layer.

2. Foreign Avionics Systems Embedded Online Monitoring Technologies

As the proportion and importance of electronic devices in aviation equipment increase, embedded online monitoring technology for electronic devices aimed at improving operational reliability has gained widespread attention in recent years. Foreign electronic products have widely applied related embedded online monitoring technologies. It is well known that the embedded online monitoring technology at the Maryland CALCE Electronics Products and Systems Center is at the world-leading level. The American company Impact has achieved lifetime loss monitoring of avionics systems, GPS systems, and switching power supply systems by integrating sensor parameters with physical damage models. The electronic product host circuit of the American company Ridgetop has realized fault prediction functions by setting up warning circuits, providing PHM solutions for Boeing’s Apache helicopter and the European Aeronautic Defence and Space Company (EADS). It mainly uses the SJBIST platform for real-time status monitoring and health management of key units in the Joint Strike Fighter (JSF) control system, and has developed an embedded online monitoring prototype for the aircraft’s switching power supply system using the RingDown platform. Since 1985, the Joint Test Action Group (JTAG) has released multiple standards related to electronic device boundary scanning, greatly promoting the application of embedded online monitoring technology; since 1995, IEEE has released multiple standards for embedded chip testing, memory device testing, and embedded instrument testing, laying the foundation for the further development of embedded online monitoring technology for avionics products.

Through in-depth research on relevant foreign technologies, various embedded online monitoring methods for foreign avionics systems have been obtained, as shown in Table 1.

Table 1. Foreign Avionics Systems Embedded Online Monitoring Methods

2.1 Online Monitoring Methods for Different Levels of Avionics Products

Foreign electronic products generally adopt a five-level online monitoring solution, mainly including chip-level, component-level, board-level, LRU module-level, and system-level. The chip-level utilizes PDK Check tools to build in-situ test databases, employing principles such as canary circuits and Negative Bias Temperature Instability (NBTI) effect aging to achieve embedded online monitoring. The component-level mainly focuses on embedded monitoring for degradation aging, radiation damage, and intermittent faults. The board-level primarily monitors integrated circuits, capacitors, FPGA chips, CPU chips, and intermittent faults in solder joints. For example, the American company Ridgetop uses the SJBIST tool to implement online monitoring of intermittent faults in Ball Grid Array (BGA) packaging by utilizing embedded boundary scan BIT methods in FPGAs. It can also use the SJMonitor tool to construct a separate integrated circuit for external interconnection monitoring, achieving automatic control and evaluation of FPGA testing. The LRU module-level mainly conducts online monitoring for power boards, digital circuit boards, analog circuit boards, and connectors. For example, the PDCT tool can utilize software-based automatic correction methods to detect intermittent failures of PCBs and components due to installation issues. The RingDown tool achieves non-intrusive power health status monitoring, while the RingDownEMA tool conducts non-intrusive diagnostic analysis of motor devices. The PHMPro tool collects measured anomaly signals, providing a basis for future diagnostic analysis. The system-level mainly conducts online monitoring for the connection networks between various LRUs, utilizing the Sentinel Network tool to provide anomaly acquisition and diagnostic analysis services for IT networks, and the Sentinel PHMPro tool can support Integrated Vehicle Health Monitoring (IVHM) through the network. In recent years, boundary scan technology has been widely applied in the embedded online monitoring process of foreign avionics systems. The American company Lockheed Martin, in collaboration with JTAG, successfully developed boundary scan-based circuit board testing products, which have been applied in onboard electronic products. The American Advanced Test Engineering (A.T.E) has developed a boundary scan-based system-level diagnostic tool, achieving the application of boundary scan technology in system-level embedded online monitoring. The American ASSET company has embedded JTAG boundary scan testing components into electronic template BIT designs, eliminating the need for additional physical probes, cables, and interfaces, solving practical issues of low reliability, frequent failures, and high false alarm rates in existing BIT systems. Boundary scan technology continues to be applied in foreign equipment BIT designs; however, due to the inherent security risks of JTAG, the American ASSET company has proposed measures and methods to reduce security risks, such as chip locks, key registers, secure key systems, and TDI/TDO encryption.

2.2 Adopting Adaptive Online Monitoring Methods for Different Circuit Types

Different online monitoring methods need to be adopted for different circuit types. For digital circuits, existing design-for-testability and testing methods (such as exhaustive methods, D algorithms, etc.) can be employed to test the original circuits for embedded testing, achieving fault detection while minimizing the impact on the circuit board’s functionality. If combined with boundary scan testing technology, the fault detection capability can be greatly enhanced. In recent years, foreign countries have developed boundary scan modules that can be accessed remotely via wired and wireless communication methods, addressing the practical issues of system-level test access difficulties due to the miniaturization of electronic products. For analog circuit boards, the opposite is true; even testing a simple parameter or fault may require the addition of certain testing circuits to achieve embedded testing. To realize vector generation and fault analysis within the board, visual circuit board resources, size, and power consumption need to be considered, utilizing methods such as wrap BIT, comparison BIT, and self-test. The benefits and impacts of embedded testing must be comprehensively evaluated. To address the transient faults and intermittent faults in modern digital circuit systems, researchers from the Department of Electrical and Computer Engineering at the University of California have proposed an online periodic BIST technique for detecting various operational faults in digital circuit systems. This technique designs an optimal minimized test sequence for the tested circuit to conduct periodic detection, acquiring circuit responses to determine whether operational faults occur, which has advantages such as improving fault coverage and reducing or eliminating fault latency.

2.3 Online Monitoring Methods Based on Embedded Monitoring Hardware

Embedded monitoring chip technology refers to the design of specialized chip modules that integrate functionalities such as acquisition, excitation, storage, processing, diagnosis, and output within the template, used for monitoring the status of internal devices and components. Foreign developed embedded monitoring products include monitoring chips from ARM’s STM32 series, which have functions such as excitation sending, feedback receiving, data processing, large-capacity storage, and standardized communication interfaces. Users can embed this monitoring chip on the template and develop monitoring programs according to monitoring needs. The American ASSET company has utilized embedded instruments to access and control electronic products, achieving onsite online monitoring of electronic products, solving the embedded testing challenges of complex SoCs. Additionally, foreign scholars have proposed template testing monitoring technologies such as Processor-Based Functional Test (PFT) and FPGA-Controlled Test (FCT), where the former achieves online monitoring tests for onboard memory and other high-speed components through processor proxy units, while the latter utilizes embedded FPGA instruments for functional and performance testing of template components.

2.4 Predicting Remaining Life of Electronic Products Through In-Situ Monitoring of Cumulative Damage

Electronic product health management primarily involves establishing a testability design model for the tested object, combining testability analysis and fault isolation rate analysis results to find the optimal testing methods, timing, and monitoring parameters (such as device temperature, voltage, power, etc.), thus establishing functional relationships between monitoring parameters and health status items (such as overheating modes), providing thresholds as baselines, and judging the health status of electronic devices based on current monitored parameters (which can be categorized into normal, caution, and fault indications), thus achieving health forecasting for the equipment. Remaining life prediction refers to predicting the time that a product can continue to operate reliably (which can be in days or cycles) based on fault physical model-derived cumulative damage percentage data. Due to the lack of suitable monitorable degradation parameters and performance degradation parameters, as well as the extremely short failure occurrence processes (in milliseconds), predicting the lifespan of electronic products has always been a challenge. The Maryland CALCE ESPC has proposed the Life Consumption Monitoring (LCM) method for electronic products, and a typical remaining life prediction process based on failure mechanism models is shown in Figure 2.

Figure 2. Remaining Life Prediction Process Based on Failure Mechanism Models

This methodology uses environmental information based on the failure physical model of electronic products, conducting cumulative damage calculations through monitoring environmental stress and operational stress, thereby inferring the product’s remaining life. The foundation of this life prediction method is a thorough understanding of the failure modes and mechanisms of the product objects and establishing a quantitative failure physical model. This method has been applied to the lifetime prediction of electronic components in the American Space Shuttle rocket boosters, JSF aircraft power switch modules, DC/DC converters, and aviation power supplies, achieving good results. For military/aviation systems, implementing electronic system predictions must consider feasibility and economy. The American company Ridgetop analyzed the return on investment for electronic predictions of the power supply for the European fighter based on bathtub curves, providing a basis for implementing electronic predictions for power supplies. Additionally, Ridgetop has used SJBIST technology to obtain raw cumulative damage test data in Highly Accelerated Life Testing (HALT) for supporting the maturation of electronic system prediction technologies.

2.5 Monitoring Abnormal Behaviors of Electronic Products Through Artificial Intelligence Models

By online monitoring abnormal phenomena (such as vibrations, noises, pollution, temperature, and electromagnetic fields) exhibited or detectable under abnormal working conditions of the observed objects, fault diagnosis can be achieved. Currently, foreign data-based monitoring models for detecting abnormal phenomena in electronic products include Singular Value Decomposition, Principal Component Analysis, Neural Networks, Gaussian Mixture Models, Hidden Markov Models, Kalman Filtering, Taylor Series Expansion, Probabilistic Trend Analysis Models, Bayesian Models, and Data Fusion Models. The American company Agilent (now Keysight) has enhanced electronic product fault diagnosis capabilities through test sequence optimization methods and Bayesian logic diagnosis techniques, demonstrating significant superiority over any expert system technology in practical applications. The American company Ridgetop has achieved autonomous detection and state estimation of product conditions using Multivariate State Estimation Technique (MSET) based on least-squares methods, and state prediction of products using the Auto-Associative Kernel Regression (AAKR) method based on non-parametric kernel estimation procedures. Ridgetop has implemented electronic predictions for aircraft fuel system power distributors and flight control system actuators using state estimation and prediction techniques, data processing, feature extraction based on SPICE simulation, and chip-level architecture-based embedded predictions. Furthermore, by establishing dynamic response models of the observed objects (including dynamic responses during degradation), parameter identification can be performed based on the current system’s response output, confirming fault modes, fault diagnosis, and fault prediction by comparing the statistical characteristics of parameters under normal conditions. This method provides an alternative approach to probabilistic trend analysis and ANN, with higher confidence and early fault prediction capabilities.

Additionally, establishing failure mechanism early warning models, time-dependent dielectric breakdown early warning models, and setting up warning circuits (Canary Devices) to predict faults, as well as establishing models for monitoring key performance parameter changes, resistance changes, and dynamic power consumption changes to predict faults, are also effective methods.

3. Standards for Foreign Avionics Systems Embedded Online Monitoring

The main standards for foreign avionics systems embedded online monitoring are listed in Table 2.

Table 2. List of Foreign Avionics Systems Embedded Online Monitoring Standards

Since 1985, JTAG has proposed a structured design-for-testability technique—boundary scan technology. In the early 1990s, IEEE announced the IEEE 1149.1 standard for the standardized testing access port and boundary scan design for digital circuits. With the continuous development of related technologies, various boundary scan testing standards have been developed for testing analog and mixed-signal circuits, including IEEE Std 1149.4 for standardized module testing and maintenance bus protocols, IEEE Std 1149.5 for AC coupled signal testing, and IEEE 1149.7 for multi-core integrated chip and board-level testing, providing standardized support for embedded testing of boundary scan devices. Additionally, to enhance the embedded testing capabilities of electronic devices, relevant organizations and committees have subsequently formulated and released several standards, including IEEE Std 1450 for testing interface language definitions, Std 1500 for embedded core testing, Std 1522 for measurability and diagnostic characteristics and parameter metrics, Std 1532 for programmable device embedded testing configuration and optimization, P1581 for testing memory devices, and 1687 for standardized internal access and control of semiconductor devices with embedded instruments, significantly promoting the development and application of boundary scan technology and embedded online monitoring technology in avionics devices, playing an important role in the testing and fault diagnosis of complex electronic equipment such as VLSI, multi-core, and SoC.

Since 1995, the standard working group participating in the IEEE 1450 standard development has successively developed nine related standards (IEEE 1450.0-8), unifying integrated circuit testing interface language by adopting a common test vector graphic description language, establishing a bridge between EDA environments and ATE, enabling seamless connection between EDA simulation tools and ATE, tightly linking design and testing, and providing standardized support for achieving high-efficiency and low-cost integrated circuit testing.

In 1995, the TTTC of the IEEE Computer Society began researching testing issues for embedded chips, establishing the IEEE P1500 standard in 1997, which was officially released in 2005. This standard defines a standard configurable core shell and stipulates testing access, testing control, and signal isolation mechanisms, achieving interface standardization between chip suppliers and users, significantly promoting improvements in SoC testing levels.

In 2004, the Diagnostic and Maintenance Control (D&MC) subcommittee under the IEEE Standards Coordinating Committee 20 (SCC20) released the IEEE Std 1522 trial standard. By providing formal and accurate definitions for basic metrics (such as action sets, diagnostic sets, fault sets, functional sets, maintenance sets, and resource sets), cost-related metrics (such as testing time costs, maintenance time costs, etc.), and fault detection and isolation-related metrics (such as detectable fault sets, isolatable fault sets, and fault ambiguity sets), it achieved standardized descriptions of testability and diagnostic metrics. To meet the testability requirements of programmable devices such as FPGA, CPLD, and PROM, IEEE released the IEEE 1532 standard in 2002, achieving the standardization of internal access forms, testing methods, and control logic for programmable devices by constructing system models that comply with IEEE 1532 standards, defining instruction sets, and standardizing instruction loading and testing processes, thereby improving the testability level of programmable devices.

In response to the accelerated updates of memory devices and the different technical requirements for testability presented by different types of memory devices during board-level testing, IEEE released the P1581 white paper in 2007, proposing a standard for testing memory devices that utilizes built-in pins of memory devices to achieve standardized testing without adding boundary scan circuits and additional pins, solving many issues in board-level testing and system-level interconnect testing, significantly enhancing the testability level of memory devices.

Additionally, for complex SoCs composed of multi-layer components (each layer of which may include various embedded IP), traditional fixed-length boundary scan chains and fixed instruction configurations are insufficient to meet the increasing automated testing demands of embedded IP in SoCs. In 2014, IEEE released the IEEE 1687 standard, defining the IJTAG architecture, IJTAG usage model, and network connection methods, enabling access and control of embedded instruments (which can be any on-chip circuits being tested and diagnosed, such as analog IP, mixed-signal IP, DSP, clocks, etc.), achieving efficient, low-cost, and rapid access to MBIST and the internal scan chains of chips, addressing the embedded testing challenges of complex SoC chips.

4. Development Verification Tools for Foreign Avionics Systems Embedded Online Monitoring

The list of foreign avionics systems embedded online monitoring development tools is shown in Table 3.

Table 3. List of Foreign Avionics Systems Embedded Online Monitoring Development Tools

Below, we analyze three typical tools: Falsim for circuit fault simulation and testing verification software, SJBIST for board-level online monitoring design development verification tools, and RingDown for module-level online monitoring design development verification tools.

The Falsim software is a tool that utilizes the Pspice library to implement circuit fault simulation and device fault injection, and can automatically conduct Failure Mode and Effects Analysis (FMEA). Before performing circuit fault simulation using the Falsim tool, users must first select component categories (such as capacitors, resistors, integrated circuits, etc.), component types (such as Class 1 ceramic capacitors, metal film resistors, MOS digital circuits, bipolar digital circuits, etc.), fault modes (such as parameter drift, open circuit, short circuit, disconnection, input performance degradation, output delay, output performance degradation, analog output failure, etc.), and fault pins (such as CLK, J, K, etc.), and set parameter drift values. Then, signal criteria must be added for different types of signals (such as current, voltage, digital, etc.). For digital signal criteria, output signal criteria can be based on transition time, allowed transition time, and transition level after the jump. Finally, the tool can automatically complete fault injection for the selected circuit and conduct FMEA, providing analysis results and reports.

The SJ-BIST platform was jointly developed by the testing and service company of the European aerospace and the American Ridgetop company for electronic products’ board-level failure detection and early warning. The SJ-BIST application process is as follows: first, select the I/O pins to be monitored and determine the clock frequency for running SJ-BIST; then, confirm whether the internal software kernel operation frequency of the monitored component matches with SJ-BIST, and determine the specific SJ-BIST configuration content required for the application; finally, determine the methods used in specific applications and the content of SJ-BIST report output. The American Ridgetop company developed a BGA solder failure detection prototype using SJ-BIST for BGA components, achieving online monitoring of BGA solder failures. For the large number of integrated chips or microprocessors (such as FPGAs) in the onboard control system of the JSF aircraft, which experience intermittent faults due to complex thermal and mechanical stresses causing cracks in the input and output pins, the American Ridgetop company proposed specific fault diagnosis and prediction solutions using the SJ-BIST system, achieving real-time status monitoring and health management of key units in the JSF aircraft control system, ensuring the operational readiness of the JSF aircraft.

The RingDown platform, developed by the American Ridgetop company, is used for failure detection and early warning of power devices. The RingDown platform uses dedicated external sensors directly installed on the circuit board and employs special techniques to extract measured values and determine the characteristics of control circuits, enabling rapid online or offline testing of power supplies, reducing overall testing costs. The RingDown platform can accurately predict losses and assess the health status and remaining useful life (RUL) of power supplies. It supports real-time, transient detection and real-time remote monitoring of multi-power systems, providing early warnings and preventive maintenance for power supply failures, thus reducing downtime. The process of developing an online monitoring system for electronic devices using the RingDown platform involves first clarifying the characteristics and failure modes of the monitored devices, constructing a test board that supports fault injection, then configuring applicable algorithms for predicting the monitored devices, extracting failure characteristics, and finally calculating the remaining useful life. The testing and service company of the European aerospace utilized the RingDown platform to develop a status monitoring system for switching power supplies. The implementation process includes analyzing the working principles, failure modes, and fault injection methods of the switching power supply, determining the connection methods and application scenarios of the status monitoring system with the switching power supply, and finally using the RingDown platform for simulation, development, and verification, resulting in a corresponding status monitoring system prototype that has been applied as a mature product in various aircraft models.

5. Insights for Domestic Design, Development, and Use of Embedded Online Monitoring Systems

Through an in-depth analysis of foreign embedded online monitoring technologies, standards, and tools in recent years, combined with domestic actual needs, the following main suggestions are proposed for the design, development, and use of embedded online monitoring systems in China.

(1) Conduct research on the architecture of embedded online monitoring systems to support the development of aircraft-level embedded online monitoring systems from a top-down perspective.

Based on the design and usage needs of domestic avionics equipment embedded online monitoring systems, clarify the structural framework, component units, interface relationships, operation modes, and information transmission of domestic embedded online monitoring systems, constructing a system architecture to provide a basis for developing aircraft-level embedded online monitoring systems.

(2) Master foreign onboard embedded online monitoring standards, and develop standardized communication interfaces and protocol modules based on domestic onboard online monitoring actual needs, enhancing the ability to transform, absorb, and innovate related standards.

For the IEEE Std 1149.1 standard, a standardized test access interface controller based on boundary scan can be developed. For the IEEE Std 1149.4 standard, a testing module for analog and mixed-signal circuits based on boundary scan can be developed. For the IEEE Std 1149.5 standard, relevant interface modules for standardized module testing and maintenance bus protocols can be developed. For the IEEE Std 1149.6 standard, an AC coupled signal testing module based on boundary scan can be developed. For the IEEE 1149.7 standard, a multi-core integrated chip and board-level testing module based on boundary scan can be developed. For the IEEE Std 1450 standard, tools related to testing interface language can be developed. For the IEEE Std 1522 standard, testability and diagnostic characteristics and metrics can be defined to provide a basis for assessing testing and diagnostic capabilities.

(3) Develop reconfigurable, customizable, and miniaturized onboard embedded online monitoring modules to meet the monitoring and diagnostic needs of different types and levels of onboard products, enhancing the engineering application capabilities of monitoring modules.

Different types of circuits in avionics equipment, such as traditional analog circuits, digital circuits, and mixed-signal circuits, as well as new generation VLSI, multi-core, and SoC circuits, have different structural, functional characteristics, and operational features, requiring different monitoring methods, diagnostic methods, and prediction models. Additionally, system-level, LRU-level, and board-level onboard products have different monitoring and diagnostic needs. Therefore, constructing a reasonable and feasible structure for reconfigurable and customizable onboard embedded online monitoring modules is a prerequisite for developing this product. Generally, this module structure should support at least the following functions: ① the internal boundary scan controller of the module should support the IEEE 1149.1 standard and support the conversion of the IEEE 1149.1 protocol to MTM bus, CAN, and other bus protocols; ② the module should support control functions for digital instruments, digital multimeters, limit detectors, and timers/counters; ③ the module should support interface and communication functions with external large-capacity storage devices, supporting communication functions with the MTM bus; ④ the module’s channel count, maximum storage depth, highest sampling rate, maximum measurement range, measurement resolution, and other indicators should meet the testing needs of actual electronic products. Furthermore, under the requirements for multi-functional integration, miniaturization, embeddability, high real-time performance, high stability, low power consumption, and low cost, China still needs to overcome key technologies such as miniaturized composite signal excitation, high real-time synchronous data acquisition, high real-time high stability large-capacity storage, high-speed data processing, and low-power low-cost power supply to develop corresponding miniaturized embedded online monitoring modules to meet onboard product usage requirements.

(4) Organize the verification index system for embedded online monitoring and construct a development verification platform for embedded online monitoring systems to accelerate the engineering process.

From the perspective of the functionality, performance, and user needs of embedded online monitoring systems, conduct research on the verification requirements, indicators, and processes for embedded online monitoring. The verification processes for embedded online monitoring systems and design processes are complementary; corresponding verification and confirmation activities should be conducted at each stage of the system design process. It is recommended to construct a development verification platform for embedded online monitoring systems based on the different levels of embedded online monitoring in aviation equipment, mainly used to verify the online status monitoring capabilities of each level, as well as the interconnections, information flow, instruction interactions, and data transmission aspects of the system architecture, while also verifying and identifying quantitative indicators such as fault detection rates and fault isolation rates at each level.

(5) Promote the synchronized construction of the standard system and product development for embedded online monitoring, enhancing engineering application capabilities.

Introduce standards and specifications related to the design, development, use, and maintenance of onboard embedded online monitoring systems and monitoring modules, based on a reasonable and feasible onboard embedded online monitoring technology standard system. Promote standardization work in the development process of embedded real-time testing and monitoring modules, providing standardized support for principle verification, technology maturation, and engineering development.

6. Conclusion

Based on the analysis of the architecture of foreign avionics systems embedded online monitoring systems and the five-level online monitoring solutions for foreign electronic products, this article analyzes the development of embedded online monitoring technologies based on monitoring hardware, in-situ monitoring of cumulative damage, and artificial intelligence models. It elaborates on the development of embedded online monitoring standards based on boundary scan, monitoring chips, and monitoring instruments, and introduces the functions, characteristics, and applications of foreign embedded online monitoring development verification tools such as Falsim, SJ-BIST, and RingDown. Finally, combined with domestic actual needs, suggestions for conducting work from the aspects of aircraft-level embedded online monitoring system architecture, the development of dedicated monitoring modules, the construction of embedded online monitoring system development verification platforms, and standardization efforts are proposed, hoping to provide certain reference and guidance for the future development of embedded online monitoring technology for avionics systems in China.

END

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