Note: This article is based on TC375 discussions.
1. Why Do We Need Alarms?
We know that for a chip, in addition to the CPU (Central Processing Unit), there are a large number of peripheral modules that work together to achieve the expected functionality. Since these are independent hardware entities, there is a possibility of failure under certain operating conditions. To manage these failure scenarios, a unified overseer is needed to collect these exception messages, and then apply corresponding handling strategies to the exception modules. The overseer that collects exception information is the SMU, which notifies the SMU of exception messages through Alarms, as shown below:
Thus, the purpose of designing Alarms is to monitor the chip’s operational status and to perform corresponding post-processing for fault states.
2. Who Manages the Alarms?
The previous section has already provided the answer: Alarms are managed by the SMU, which interacts with other module interfaces, as shown below:
3. How to Handle Alarms When They Occur?
According to the reference manual, upon detecting an Alarm, various types of actions can be triggered, as described below:
4. Source Code
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