The RZ/G2L microprocessor is equipped with a Cortex®-A55 (1.2GHz) CPU, a 16-bit DDR3L/DDR4 interface, a 3D graphics acceleration engine with Arm Mali-G31, and a video codec (H.264). Additionally, this microprocessor features a variety of interfaces, such as camera input, display output, USB 2.0, and Gigabit Ethernet, making it particularly suitable for entry-level industrial human-machine interfaces (HMIs) and embedded devices with video capabilities.
Table of Contents
DDR Configuration of RZ/G2L
1. Support for DDR in RZ/G2L
1.1 Supported DDR Types for RZ/G2L
1.2 Hardware Features of RZ/G2L DDR Controller
1.3 Introduction to ECC Functionality of RZ/G2L DDR Controller
2. Background Technology of DDR3 and DDR4
2.1 DDR3
2.2 DDR4
2.3 DDR3L
2.4 Technical Characteristics and Differences between DDR3L and DDR4
3. Usage Process of DDR Configuration Tool (Taking RZ/G2L as an Example)
3.1 Introduction to Configuration Tool
3.2 Preparations Before Use
3.3 Specific Steps for Use
3.3.1 Selection of 01_Condition and 02_Connection Tables
3.3.2 Selection of 03_Topology Table
3.3.3 Operations on 05_CA_Remap Table
3.3.4 Operations on GenParam Table
3.3.5 Generating Configuration File
3.4 Tips and Precautions for Use
4. Summary
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Support for DDR in RZ/G2L
1.1
Supported DDR Types for RZ/G2L
The RZ/G2L-LC-UL model of the MPU processor is quite flexible in memory adaptation; their DRAM IF/MC/PYH modules are the same, making the configuration tool universal, supporting both DDR3L and DDR4 types of DDR memory.
DDR3L is the low-voltage version of DDR3, operating at a voltage of 1.35V. In the RZ/G2L, its data transfer rate ranges from 800-1333Mbps (corresponding to 400-666MHz). The lower operating voltage gives it an advantage in power consumption control, making it suitable for power-sensitive embedded device scenarios, such as portable industrial control terminals and mobile data acquisition devices.
DDR4 is the next generation of memory technology, with the operating voltage further reduced to 1.2V. The supported transfer rates on RZ/G2L range from 1333-1600Mbps (666-800MHz). Higher transfer rates and lower power consumption make it perform better in handling complex computational tasks and large data transfers, suitable for applications with high performance requirements, such as edge computing devices and high-end industrial automation control systems.
Additionally, both types of memory support 16-bit data and can be configured for full-width (16 bits) or half-width (8 bits) data width modes, as well as single Rank (Rank: 1) or dual Rank (Rank: 2) configurations, meeting different memory capacity and performance needs.
1.2
Hardware Features of RZ/G2L DDR Controller
The DDR-related hardware architecture of RZ/G2L consists of multiple key modules working together to ensure efficient data transmission and stable operation of the memory.
The memory controller (MC) adopts a fully pipelined design, providing efficient interface channels for commands and read/write data. This design allows memory access instructions to be processed quickly in a pipelined manner, greatly increasing the throughput of memory data. It also features advanced bank look-ahead capabilities, which can predict memory access patterns in advance, optimizing the order of data reads and writes, further enhancing memory access efficiency.
Through a programmable register interface, developers can flexibly control memory parameters and protocols, including an automatic precharge function that automatically precharges storage units after memory operations are completed, preparing for the next operation and reducing wait times. During controller reset, the memory can achieve full initialization, ensuring consistency and accuracy of memory state at system startup.
The physical layer (PHY) integrates various important functions. The write leveling function can adjust the phase relationship between the clock and data signals during data writing, ensuring accurate data writing to memory units; bit leveling is used to calibrate the phase difference between data signals (DQS) and data (DQ/DM), ensuring the accuracy of data transmission; Vref training (Read and Write) optimizes signal quality during data reads and writes by automatically adjusting the reference voltage; self-calibration logic can adjust the phase relationship between read data and the internal clock, ensuring the accuracy of data reading; command/address swizzling function optimizes address mapping to improve memory access efficiency and enhance overall system performance.
1.3
Introduction to ECC Functionality of RZ/G2L DDR Controller
The ECC (Error Correction Code) functionality of RZ/G2L is an important mechanism for ensuring data reliability. During data storage and transmission, various factors can interfere, causing data errors. The ECC functionality can effectively detect and correct these errors.
For single-bit errors, ECC can automatically detect and correct them, ensuring data accuracy. In the case of double-bit errors, ECC can promptly report error information; although it cannot directly correct them, it allows the system to take appropriate measures, such as re-reading data or performing error handling, to prevent erroneous data from severely impacting system operation.
Additionally, the ECC functionality supports programmable ECC storage removal, allowing developers to flexibly choose to enable or disable the ECC functionality based on actual application scenarios and needs. In cases where data reliability is not highly required and there is a desire to reduce system resource usage, the ECC functionality can be disabled to save memory space and computational resources.
For more detailed usage methods, please refer to the following websites:
Renesas Official Website
https://www.renesas.cn/cn/zh/products/microcontrollers-microprocessors/rz-mpus/rzg2l-getting-started
RZ Product WIKI Website
https://renesas.info/wiki/Main_Page
Conclusion
Stay tuned
The excitement is not over yet; in the next issue, we will delve into the background technology of DDR3 and DDR4, so stay tuned!
Need Technical Support?
If you have any questions while using Renesas MCU/MPU products, you can scan the QR code below or copy the URL into your browser to enter theRenesas Technical Forum to find answers or get online technical support.
https://community-ja.renesas.com/zh/forums-groups/mcu-mpu/
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Recommended Reading
Product Introduction | RZ/G2 Series MPU
New Product Launch | Renesas Ecosystem Partner Meil Electronics, Launching RZ/G2UL Core Board, Supporting Industrial 4.0 Development!
Written at the Renesas Electronics 2023 Industrial Summit (3) Partner Solution Sharing – Part Two
