Connecting the Mojo V3 FPGA Board with a 16×2 LCD Module

In this tutorial, we will design a digital circuit using Verilog HDL that connects to a general LCD module based on the HD44780 LCD controller/driver chip. The Mojo V3 FPGA board will be used to implement the design. The LCD module used in this article is the 1602A display.

Previously, we discussed the details of LCD modules using the HD44780 LCD controller/driver chip. The pin arrangement of these LCD modules is shown in Figure 1.

Figure 1. Image provided by AAC

As you can see, there are three control pins (RS, R/W, and E) and eight data pins (DB7 to DB0). For write operations, we need to apply the appropriate voltages to these pins, as shown in the timing diagram in Figure 2.

Figure 2. Image provided by HITACHI

The different delay values from the above timing diagram are shown in the table below:

Table 1. Provided by HITACHI

There are several instructions available to configure the LCD module. Below are some important instructions listed.

Table 2

Path 1

We want to display the message “HELLO WORLD!” on the LCD screen. Let’s take a look at the building blocks required for the digital system to communicate with the LCD module. We need a ROM to store the ASCII codes of the message characters. As shown in Figure 3, the output of the ROM will be connected to the 8 data pins of the LCD module.

Figure 3

The message “HELLO WORLD!” consists of 12 characters, and we can use a 12✕8 bit ROM to store the message. However, let’s consider providing a 16✕8 bit ROM for the message so that we can display messages up to 16 characters long (the length of the first line of the LCD). If our message is a maximum of 16 characters, you may wonder why the above figure shows a 20✕8 bit ROM. The additional four bytes will be used to store data related to the LCD commands that allow us to configure the module. For instance, as listed in Table 2, we can apply the hexadecimal value 0x38 to the LCD data pins to specify that the LCD module should receive/send data in 8-bit length. Just like character codes, the hexadecimal values of the commands are applied to the data pins, so we can store these two commands in the same ROM.

In this article, we will use four commands (0x38, 0x06, 0x0C, and 0x01) to configure the LCD. You can find a brief description of these commands in Table 2. Therefore, we have a 20✕8 bit ROM where the first four bytes are 0x38, 0x06, 0x0C, and 0x01. The next 16 bytes store the ASCII codes of the message. Considering the timing diagram in Figure 2, we observe that the data applied to DB7-DB0 should not change for a certain period so that the LCD can successfully read the data. Thus, as shown in Figure 3, we need a set of D flip-flops (DFF) to keep the ROM address (DB7-DB0) constant for a period of time. After the LCD reads the data, we need to increment the address value to apply the next character/command to the LCD. Therefore, as shown in Figure 4, a multiplexer and an incrementer should be placed before the DFF.

Figure 4

Using the select input of the multiplexer, we can specify whether the address value should remain constant (S1=0) or increment (S1=1). The multiplexer has a third option that allows us to reset the address value to 00000. This can also be achieved by resetting the DFF. We refer to all these blocks as Path 1, as shown in the figure. As discussed later in this article, we will use the S1 signal to control the circuit within the Path 1 block. The address register signal will be used to monitor the status of Path 1. It is worth mentioning that, although the above figure only shows one DFF, there are actually five DFFs (since the 20-byte ROM requires a 5-bit address bus).