RISC-V is an open-source instruction set architecture (ISA). Compared to other mainstream instruction sets like x86 and ARM, RISC-V’s core advantages lie in its complete open-source nature and royalty-free usage, allowing any enterprise or individual to freely use, modify, or extend its instruction set, significantly lowering the barriers to chip design. This enables China to avoid reliance on x86/ARM licenses and mitigate supply chain threats caused by geopolitical issues.
In 2024, global shipments of RISC-V chips have reached over 10 billion units, with China contributing more than 50%, becoming the core engine of ecosystem growth. It is expected that by 2031, the market penetration rate of RISC-V SoCs will leap from 5.9% in 2024 to 25.7%, with shipments exceeding 20 billion units and a compound annual growth rate of over 40%.
The eight departments of China plan to promote the “National Guidance on RISC-V Chip Development,” which prioritizes the procurement of domestic RISC-V chips in government and infrastructure sectors. Deputy Director of the Ministry of Industry and Information Technology, Shi Huikang, proposed to “accelerate transformation and drive large-scale applications,” requiring the bridging of the “last mile” from laboratory to mass production, focusing on high-value areas such as high-performance computing, AI servers, and smart vehicles.
On July 19, according to data from the RISC-V International Foundation, global shipments of chips based on the RISC-V instruction set are expected to exceed 10 billion units in 2024, with 30% applied in AI acceleration scenarios. The recently concluded Fifth RISC-V China Summit also highlighted the applications of RISC-V chips in artificial intelligence and large model inference.
As an open-source instruction set architecture, RISC-V is profoundly reshaping the competitive landscape of the global chip industry, with its market prospects closely intertwined with policy dividends, presenting a dual trend of rapid growth and strategic upgrades.
The core concept stocks are as follows:
Chipone Technology (688521.SH)
Chipone Technology is the first chairman unit of the China RISC-V Industry Alliance, collaborating with over a hundred institutions to promote standardization and ecosystem development. The company has launched an open hardware platform based on single-core, dual-core, and quad-core RV64 CPU clusters, integrating self-developed NPU, GPU, ISP, and other core IPs, and providing a Linux software SDK. Several customer projects utilizing the RISC-V architecture are currently in progress, including TWS Bluetooth connection platforms, data center video codec platforms, and navigation chips, covering IoT, AI terminals, and automotive electronics.
Beijing Junzheng (300223.SZ)
The company’s current main product, the T series chips (accounting for over 80% of computing chip revenue), all integrate self-developed RISC-V coprocessors responsible for real-time task scheduling and low-power management, while the main computing core still uses the MIPS architecture, widely applied in scenarios such as smart glasses (e.g., T31/T32) and robotic vacuum cleaners. The company has clearly stated its intention to launch pure RISC-V core chips to gradually replace the existing hybrid architecture and solve ecological compatibility issues.
Huada Empyrean (301269.SZ)
As a member of the China RISC-V Industry Alliance, Huada Empyrean collaborates with companies like Chipone Technology and Beijing Junzheng to build a domestic chip ecosystem. The company’s core EDA tools (such as analog circuit design and digital front-end design tools) fully support the RISC-V instruction set, providing end-to-end services from instruction set customization, IP core optimization to chip verification. The company is deeply involved in the formulation of technical standards for the Xuantie RISC-V ecosystem, promoting the application of open-source instruction sets in AIoT and industrial control scenarios.
GigaDevice (603986.SH)
In 2019, GigaDevice was the first to release the GD32V series 32-bit general-purpose MCU (GD32VF103) based on the RISC-V core, becoming the first company globally to introduce RISC-V into the general microcontroller field. Currently, MCU products cover both ARM and RISC-V architectures, totaling 51 categories and over 700 models, meeting various market demands. RISC-V products focus on low-cost sensitive markets (such as home appliances and industrial wireless interconnects).
Allwinner Technology (300458.SZ)
Since launching its first RISC-V chip D1 (featuring the Xuantie core) in 2021, most of the company’s chips have integrated the Xuantie RISC-V architecture, overcoming key IPs at 12nm. The company provides integrated solutions from instruction set to chip, covering diverse scenarios such as smart cities, smart vehicles, and smart home appliances. The company actively promotes the compatibility of RISC-V with mainstream operating systems (such as HarmonyOS and Android).
Unisoc (002049.SZ)
As a member of the China Open Instruction Ecosystem (RISC-V) Alliance, Unisoc is advancing the development of intelligent security chips based on the RISC-V architecture, successfully developing a system-level programmable chip (SOPC) based on the RISC-V core, integrating multiple circuit modules suitable for high-performance computing and security control scenarios; currently, the sample testing feedback is positive, laying the foundation for subsequent mass production.
Espressif (688018.SH)
A leading company in the global IoT Wi-Fi MCU chip market share, since 2020, all new product lines (including ESP32-C/H/P/S series) have adopted self-developed 32-bit MCUs based on the RISC-V instruction set, gradually replacing traditional architectures. The company has released multiple products using self-developed 32-bit MCUs based on the RISC-V open-source instruction set, integrating the RISC-V instruction set into the ESP32 series MCUs, with a maximum clock frequency of 400MHz, entering a period of rapid revenue growth.
Runhe Software (300339.SZ)
Since 2022, the company has deeply integrated the RISC-V architecture with the open-source HarmonyOS (OpenHarmony), launching the first domestic development platform HH-SCDAYU800 (based on the Xuantie TH1520 processor) that supports high-performance chips based on RISC-V, achieving full-stack autonomy from “hardware-OS-application.” The company has released the “Hongrui” AI development platform, which integrates RISC-V + OpenHarmony + Star Flash technology + DeepSeek edge-side models for the first time. Additionally, it has launched commercial devices such as tablets, edge computing gateways, and cloud desktop terminals based on RISC-V, forming a collaborative AI delivery solution across “cloud-edge-end.”
Guoxin Technology (688262.SH)
The company has initiated the design and development of its first high-performance automotive-grade MCU chip CCFC3009PT based on the RISC-V architecture, adopting a “RISC-V multi-core + AI coprocessor” dual-core architecture (5 main cores + 3 lock-step cores), with computing power exceeding 6000 DMIPS, targeting to replace imported chips for applications in intelligent driving and smart cockpits.
Zhongke Lianxun (688332.SH)
Since its establishment, the company has adopted the RISC-V instruction set architecture as its technical route, independently developing high-performance CPU cores and DSP instructions based on the open-source RISC-V, combined with the open-source real-time operating system RT-Thread to achieve deep optimization of audio algorithms. The company has independently designed key modules such as Bluetooth dual-mode baseband/RF, audio CODEC, and power management systems, forming a complete wireless audio SoC solution, reducing dependence on external IP. In 2025, it will launch the “Xunlong Third Generation” chip, integrating RISC-V CPU and HiFi 4 high-performance DSP, supporting Bluetooth 6.0 specifications (the first non-mobile chip manufacturer in China to obtain dual-mode 6.0 certification).
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