Recently, AMD announced that it will release standalone NPUs. What does this mean?
For me, large-scale model computations primarily use GPUs, but this concept mainly comes from cloud data centers.
However, personal devices, including smartphones and AI PCs, now integrate CPUs, GPUs, and NPUs into a single SoC chip. The CPU, as we know, is responsible for logical operations; the GPU handles graphics rendering and gaming, but it also has strong parallel capabilities, albeit with relatively high power consumption, making it inefficient for AI utilization. The NPU compensates for some of the GPU’s shortcomings, focusing on AI large model inference with lower power consumption.
Now, AMD’s decision is to launch standalone NPUs, capable of providing multiple NPUs on a single PC. If each NPU has a computing power of 50 TOPS, then two NPUs would provide 100 TOPS, with power consumption significantly lower than that of GPUs, making it extremely important for mobile devices.
In fact, this idea has already been implemented by other manufacturers. Dell recently released the Pro Max Plus, which is equipped with Qualcomm’s AI 100 PC inference acceleration card.
Therefore, the future market competition for NPUs will be very fierce, with smartphone manufacturers and computer/server manufacturers facing direct competition, marking a battle between x86 and Arm.
However, AMD will not use the x86 architecture to design NPUs; instead, it will utilize Xilinx technology, indicating that the acquisition was also aimed at the promising future of FPGAs.