What are Addressing Modes?

In assembly language, addressing modes determine how instructions access and manipulate data. Most instructions require operands, and the addressing mode specifies how to locate these operands.

Basic Addressing Modes

1. Register Addressing

In this mode, the operands are stored directly in registers.

; Example code
MOV DX, TAX_RATE   ; Register is the first operand (destination)
MOV COUNT, CX      ; Register is the second operand (source)
MOV EAX, EBX       ; Both operands are registers

Characteristics:

• Data processing does not involve memory access
• Fastest execution speed
• Operand length is determined by register size

2. Immediate Addressing

The operand is a constant value given directly.

; Data definition
BYTE_VALUE  DB  150    ; Define byte value
WORD_VALUE  DW  300    ; Define word value

; Immediate addressing example
ADD BYTE_VALUE, 65    ; Byte immediate addition
MOV AX, 45H           ; Immediate value transfer to AX
MOV EAX, 1234H        ; 32-bit immediate value

Characteristics:

• Operands are directly included in the instruction
• The first operand determines the data length
• Suitable for initialization and small constant operations

3. Direct Memory Addressing

Access data directly via memory addresses.

; Data segment definition
DATA SEGMENT
    BYTE_VALUE DB 150
    WORD_VALUE DW 300
DATA ENDS

; Direct memory addressing example
ADD BYTE_VALUE, DL    ; Add register to memory location
MOV BX, WORD_VALUE    ; Transfer memory operand to register
MOV AX, [1234H]       ; Direct address access

Characteristics:

• Requires access to main memory
• Execution speed is relatively slow
• Uses variable names or direct addresses

4. Direct Offset Addressing

Access data using a base address plus an offset, commonly used for array operations.

; Array definition
BYTE_TABLE DB 14, 15, 22, 45      ; Byte array
WORD_TABLE DW 134, 345, 564, 123  ; Word array

; Direct offset addressing example
MOV CL, BYTE_TABLE[2]   ; Get the third element (index 2)
MOV CL, BYTE_TABLE + 2  ; Equivalent notation
MOV CX, WORD_TABLE[3]   ; Get the fourth element
MOV CX, WORD_TABLE + 3  ; Equivalent notation

Characteristics:

• Suitable for accessing arrays and structures
• Offset is determined at compile time
• Supports flexible address calculations

5. Indirect Memory Addressing

Access memory via addresses stored in registers.

; Array definition
MY_TABLE TIMES 10 DW 0  ; Allocate 10 words, initialized to 0

; Indirect addressing example
MOV EBX, MY_TABLE      ; EBX points to the start address of the array
MOV [EBX], 110         ; MY_TABLE[0] = 110
ADD EBX, 2             ; EBX points to the next element
MOV [EBX], 123         ; MY_TABLE[1] = 123

; Using different registers
MOV ESI, MY_TABLE      ; ESI as index register
MOV [ESI], AX          ; Indirect access via ESI
ADD ESI, 2             ; Move to the next element

Characteristics:

• Suitable for dynamic address calculations
• Can be used to traverse arrays
• Supports runtime address modifications

Detailed Explanation of the MOV Instruction

The MOV instruction is used for data transfer and is one of the most commonly used instructions.

Format of the MOV Instruction:

MOV destination, source

Five Basic Forms:

; 1. Register to Register
MOV AX, BX
MOV EAX, EBX

; 2. Immediate to Register
MOV CX, 100
MOV EDX, 12345678H

; 3. Memory to Register
MOV AX, [VARIABLE]
MOV EBX, [MEM_LOC]

; 4. Register to Memory
MOV [COUNT], AX
MOV [ARRAY+4], EBX

; 5. Immediate to Memory
MOV BYTE [BYTE_VAL], 10
MOV WORD [WORD_VAL], 1000

Notes:

1. Operand sizes must match

   MOV AX, BL        ; Error: size mismatch
   MOV AL, BX        ; Error: size mismatch
   MOV AX, BX        ; Correct: both are 16-bit
   

2. Use type specifiers to eliminate ambiguity

   MOV BYTE [EBX], 110      ; Explicitly specify byte operation
   MOV WORD [EBX], 110      ; Explicitly specify word operation
   MOV DWORD [EBX], 110     ; Explicitly specify double word operation
   

Comprehensive Example Program

Below is a complete example program demonstrating the use of various addressing modes:

section .data
    ; Data definition
    name db 'Alex Mo ', 0        ; String
    byte_array db 10, 20, 30, 40 ; Byte array
    word_array dw 100, 200, 300  ; Word array
    count dw 0                   ; Counter

section .text
    global _start

_start:
    ; Demonstrate direct memory addressing
    mov ax, [word_array]        ; Read the first word
    mov [count], ax             ; Store into count

    ; Demonstrate direct offset addressing
    mov bl, [byte_array + 1]    ; Read the second byte (20)
    mov cx, [word_array + 2]    ; Read the second word (200)

    ; Demonstrate indirect addressing - traverse byte array
    mov esi, byte_array         ; ESI points to the start of the array
    mov al, [esi]               ; Read the first element
    inc esi                     ; Move to the next element
    mov bl, [esi]               ; Read the second element

    ; Demonstrate immediate addressing
    mov byte [esi], 99          ; Modify array element
    mov word [count], 1000      ; Set counter

    ; Demonstrate register addressing
    mov eax, ebx                ; Transfer between registers
    add ax, cx                  ; Register addition

    ; System call to exit
    mov eax, 1                  ; sys_exit system call number
    xor ebx, ebx                ; Return code 0
    int 0x80

Summary of Type Specifiers

Type Specifier	Bytes	Usage
BYTE	1	Byte operation
WORD	2	Word operation
DWORD	4	Double word operation
QWORD	8	Quad word operation
TBYTE	10	Ten byte operation

Conclusion

Mastering various addressing modes is crucial for writing efficient assembly programs:

1. Register Addressing – Fastest, suitable for frequently accessed data
2. Immediate Addressing – Suitable for constants and initialization
3. Direct Memory Addressing – Directly access variables
4. Offset Addressing – Suitable for arrays and structures
5. Indirect Addressing – Most flexible, supports dynamic address calculations

In practical programming, choose the appropriate addressing mode based on specific needs, balancing efficiency and flexibility.