2023 Digital IC Interview Experiences

The autumn recruitment has come to an end, and this year the digital IC industry is extremely competitive. Let me share my experience: both my bachelor’s and master’s degrees are from an unknown 985 university, which means I have some formal training. During my master’s program, I had several experiences in non-advanced processes, so I am quite familiar with the digital design flow, but the projects themselves are not advantageous due to the process.

I started sending out resumes in June and continued until mid-September, applying to around seventy to eighty companies. I only received my first formal offer at the end of September.

The first interview was very unprofessional, lasting just over ten minutes;

The second interview focused on projects, with coding questions about sequence detection, lasting a total of one hour;

The third interview was a brief project introduction, lasting 20 minutes. The final salary was +7, but I declined because it was in Shenzhen.

I was among the first batch for the offline written interview, and I felt that their written test was of high quality, covering a wide range of topics, including coding a synchronous FIFO (with non-contiguous addresses). The offline interview took an entire afternoon, where I was asked about my projects and AXI’s misaligned transfers. The second interview was with a supervisor who chatted casually, and a week later, HR called to say I passed the interview.

The written test covered low power, APB, and running lights. In the first interview, I was asked many AMBA-related questions, and since I had no experience with SoC projects, I stumbled through my answers, relying on some basic knowledge I had read about. I was also asked about arbiters, resets, CDC, and FIFO. The second interview experience was terrible; the interviewer kept interrupting me, saying things like “Oh, that’s simple, no need to elaborate…” I was really speechless. Later, HR called to say an intention or offer would be sent by the end of September.

The interview experience was quite good, and the questions were not very difficult. This year, the offered salary was also decent, so those pursuing stability might consider it.

The phone interview lasted an hour and was quite comprehensive, covering everything from frontend to backend. When they called me, I was just about to eat, and they asked me to interview right away. They started with some basics, then asked about CDC, RDC, and some uses of Spyglass. I must say, some of ZTE’s interviewers are quite knowledgeable. In the end, they sent me a text about SSP, but there was no further news.

I felt that the interviews at Ziguang HiSilicon were relatively simple; Guowei also asked some straightforward questions, and in the end, the salary offered was quite high.

This year, Jichuang’s candidate pool is indeed deep. I applied in June, but only got an interview appointment in September. They asked me about my projects and some standard questions, and I successfully passed the additional interview, with a high salary offered.

In the first interview, there were three interviewers, which felt like three interviews in one.

The questions asked were relatively simple, just some very basic topics.

Later, there were meetings with the CEO, group chats, and online signing sessions, which were quite bothersome, so I declined.

The interview at Dihengxian was really tough; they went into great detail about the projects. In the second interview, they asked comprehensively, covering everything from frontend to backend, from system to implementation methods, as well as some design methodologies, low power, and buses. I felt like everything I knew was thoroughly examined…

In the third interview, they continued to ask about the project, and I was left confused. After HR finished the interview, there was no further news.

This year, MPS is hiring quite a lot, and the interviews in the digital field are relatively simple, but there are requirements for English proficiency. The work-life balance is good, with a 965 schedule.

The GPU department originally from Zhaoxin has been independent, and their capabilities should be decent. The interview lasted a day, asking about FIFO depth and coding sequence detection.

Technical interviews covered OCV, perspectives on timing, the digital IC development process, asynchronous reset synchronous release, and which is more important between setup and hold in the backend, as well as factors affecting cell delay, and CDC.

For the early batch: the first interview was very basic: they asked about blocking and non-blocking, single-bit CDC, how to fix setup and hold in STA, and coded sequence detection;

The second interview focused on timing; they asked how to fix setup and hold; coding questions (sequence detection (state machine, shift register), 2-bit square operation (draw truth table)).

This year, due to the expansion of our cohort and the economic downturn, competition is quite fierce. Each company has some degree of candidate pool, making it less friendly for non-major and career-switching individuals.

Regarding projects, it is crucial to be very clear about the projects listed on your resume, whether they are your own or others’. You must be very familiar with them to avoid pitfalls.

Secondly, mastering professional knowledge is essential; you need to understand the basics of digital electronics, such as truth tables, Karnaugh maps, and the transistor-level structure of simple gates;

Then there are some standard topics: FSM, FIFO, arbiters, CDC, resets, STA, low power, glitch-free clock switching, etc. If you have competition experience, that would be even better.

My life has limits, but knowledge is limitless; let’s all work hard together.

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