Synopsys Stock Plummets 35% Amid Workforce Reduction of 10%

Synopsys Stock Plummets 35% Amid Workforce Reduction of 10%

On September 9, local time,Synopsys, a leading company in the EDA and semiconductor IP fields, announced its earnings report for the third quarter of fiscal year 2025 (ending July 31, 2025), which significantly fell short of market expectations, causing a severe shock in the capital markets. On the 10th, Synopsys’ stock price plummeted by 35.84% … Read more

Complex SoC Design Methodology: Mixed-Abstract Modeling

Complex SoC Design Methodology: Mixed-Abstract Modeling

In today’s highly complex System-on-Chip (SoC) design, engineers face a perpetual dilemma: how to achieve the right verification at the right time and with the right accuracy? The answer lies inMixed-Abstract Modeling— a core methodology that makes modern chip design possible.No single level of abstraction can simultaneously meet all requirements in terms of efficiency, accuracy, … Read more

Implementation Methods and Applications of Multi-bit (Part 1)

Implementation Methods and Applications of Multi-bit (Part 1)

Two years ago, a previous article briefly introduced some basic knowledge of Multi-bit. For more details, please refer to: Exploring Multi-Bit FF in Chip Design. Based on this old article, there are still many technical details regarding MBFF (Multi-bit FF) that are worth learning and understanding again. Therefore, I will clarify the technical and process … Read more

EDA Tools Required for Designing a 3nm Chip

EDA Tools Required for Designing a 3nm Chip

Designing a 3nm chip is a highly complex technical task that involves multiple stages from conceptual design to final manufacturing. EDA software plays a crucial role in this process. Below are the typical categories of EDA tools required for designing a 3nm chip and their representative software: Digital Chip Design Tools Logic Synthesis: Converts high-level … Read more