Design Scheme for a 20G High-Speed Acquisition System Based on FPGA
1. System Core Specifications and Requirements Analysis (Specification) Sampling Rate: Maximum real-time sampling rate of 20 GSample/s. For a single channel, the ADC sampling rate needs to reach 20GSPS. For multi-channel interleaving, such as 4 channels, each channel ADC needs to reach 5GSPS. Resolution: Typically between 8-bit and 12-bit. The resolution directly affects the data … Read more