PCB Layout Design Simulation Case Study of POC by Marin – 14

PCB Layout Design Simulation Case Study of POC by Marin - 14

1. By comparing six CASE simulations of the schematic diagram to find the situation that best matches the actual test results: A: Only the parasitic parameter model of ESD is imported (the S-parameter model of the FAKAR interface is not imported). Note: Only the parasitic capacitance values of ESD are added, not the actual S-parameters … Read more