Design of an FPGA-Based Image Compression Codec System
2020 Electronic Technology Applications, Issue 12 Abstract: In response to the real-time requirements of image processing, an FPGA-based image compression codec system has been designed. This system includes functions such as real-time image acquisition, JPEG compression, and UART transmission. The Altera DE series development board is used, and the D5M camera is configured using Verilog … Read more