Embedded Microcontroller – STM32 Microcontroller – AI

STM32 is categorized into three tiers based on its AI support capabilities, as follows: Tier One: High-Performance AI Specialized Series (with Hardware Accelerators) These series are equipped with dedicated hardware accelerators (NPU) designed for AI computations, offering efficiency and speed far superior to standard cores, making them the preferred choice for handling complex AI models. … Read more

Understanding the Roles of CPU, NPU, GPU, and DSP in Embedded Systems

1. CPU (Central Processing Unit) Meaning:The core computation and control unit of a computer, equivalent to the “brain commander.” Function:Responsible for executing computer instructions, coordinating all hardware, and handling general computing tasks, with both computation and control capabilities. Main Applications:The fundamental computations of all computing devices (computers, smartphones, servers, etc.), such as system booting, software … Read more

Kirin X90 Emerges, Accelerating the Journey of Domestic Chip Replacement

Kirin X90 Emerges, Accelerating the Journey of Domestic Chip Replacement. Before starting this article, I would like to clarify that this article represents my personal views, and the sources are from the internet. Please do not criticize if you disagree. Amidst the fierce competition in the TSMC 3nm and Samsung 2nm chip markets, a PC … Read more

How Many Tests Does a Chip Go Through Before Leaving the Factory? A Complete Reveal of Testing from Wafer to Finished Product

The smartphones and computers you use daily rely on a crucial yet often overlooked process—testing. A chip undergoes a series of rigorous tests from wafer to finished product, ensuring it operates without overheating and has low failure rates, while also validating that all functions and performance metrics meet standards. This document on wafer and chip … Read more

What Are the Components of AI Hardware? Current Major Trends

1 Composition of AI’s Body From ChatGPT to autonomous driving, from AI painting to intelligent customer service, behind every intelligent system, there is a complete set of AI hardware systems silently supporting it. Today, let’s break down what exactly constitutes the “body” of AI. 2 The “Skeleton” of AI Hardware: PCB If we compare an … Read more

Analysis of Company Concepts in PCB Drill Needles

A certain company has exceeded expectations in expanding its production of PCB drill needles, with tungsten concentrate being injected at an accelerated rate. The subsidiary, Jinzhou Precision, as a leader in AIPCB drill needles, has expanded production faster than anticipated. PCB drill needle production capacity: 70 million units by September this year, exceeding 80 million … Read more

Overview of the PCB Industry Chain

The PCB industry chain is very long and has clear divisions of labor, which can be vividly compared to a “crisscrossing” matrix. Vertically, it consists of a vertical chain from basic raw materials to final products, while horizontally, it serves a wide market for different downstream applications. 1. Overview of the Industry Chain (Vertical) The … Read more

The Path of Chip Tape-Out: How to Choose Between MPW and Full Mask?

As digital IC engineers, we all know that the tape-out process in chip design is both an exciting and stressful phase — the tape-out itself. Today, let’s discuss the two main options available during tape-out:MPW and Full Mask. This is not just a technical choice, but a strategic decision. What are the differences between these … Read more

Xilinx 1G_PCS_PMA Experiment

Xilinx 1G_PCS_PMA Experiment Reference Document PG047 1G_PCS_PMA Example Project This project implements the conversion between GMII and GT interfaces, where the GMII interface connects to an external PHY chip. graph LR; gmii_txd –> |IODELAY|gmii_txd_delay; gmii_txd_delay –> |BUGIO Sampling|gmii_txd_iff; gmii_txd_iff –> |bufr Sampling|gmii_txd_reg; gmii_txd_reg –> |elastic_buffer|gmii_txd_fifo —> gt; gmii_rxd_int(gt) –>|userclk2 Sampling|rxd_obuf; rxd_obuf –>|OBUFT|gmii_rxd; Simulation Diagram: Notes: … Read more

NPU Hardware Interface Signals and Communication Protocols

The NPU (Neural Processing Unit), as a dedicated AI acceleration chip, requires its hardware interface design to meet the demands of high bandwidth, low latency, and flexible scalability. Below are the commonly used interface signals and corresponding protocols for NPUs at the hardware level, explained with actual chip examples: 1. Memory Interface Function: Connects to … Read more