In July 2019, Alibaba’s semiconductor company, Pingtouge, officially released the Xuantie 910, claiming to be “one of the strongest RISC-V processors in the industry,” asserting that its performance rivals that of the Arm v8 architecture Cortex A7X series.
Onlookers were both excited and curious: What is RISC-V?
The CPU is essentially a chip that integrates different functional circuits. To utilize these functional circuits, the CPU needs to call the corresponding instructions—binary numbers composed of 0s and 1s. The set that defines the instruction format is called the instruction set architecture (commonly referred to as architecture). Different architectures reflect the designers’ different implementation ideas for the same function, and RISC-V is one of the top three instruction set architectures globally.
However, this “top three” claim is somewhat inflated. The other two major instruction sets, the x86 architecture dominated by Intel, are used in most PCs and servers; the Arm architecture owned by the British company Arm is used in over 99% of smartphones worldwide.
In contrast, although RISC-V ranks closely behind in terms of position, its actual market share is less than a fraction of the top two.
These three architectures represent three different business models:
The x86 architecture is firmly controlled by Intel and AMD, and other chip companies cannot use it;
The Arm architecture, while owned by Arm, is open for licensing but requires payment;
RISC-V is unique in that it does not belong to any institution or country, is open source and free to use, with operational costs supported by the foundation’s members.
In this context, the significance of RISC-V for Chinese companies in 2019 becomes clear.
At that time, China’s semiconductor industry was just beginning to feel the effects of sanctions, and the RISC-V Foundation had just moved its headquarters from the US to the neutral country of Switzerland, due to concerns about potential geopolitical disruptions. Its free and open-source nature means that no one can use “national security” as a pretext to restrict others from using RISC-V.
Initially, the foundation had only three Chinese members: Alibaba, Huawei, and the Chinese Academy of Sciences’ Computing Institute. By mid-2022, 12 of the 19 senior members of the foundation were from mainland Chinese chip companies.
As the winds of change blew, RISC-V was poised to become a legitimate contender. However, four years later, RISC-V still seems to be struggling to emerge from its alternative status.
A Competent Alternative
Among the three major instruction sets, x86 is a Complex Instruction Set Computer (CISC), while Arm and RISC-V are Reduced Instruction Set Computers (RISC). The difference is as follows:
CISC aims to complete tasks in one go, which is efficient but mentally taxing (high performance, high power consumption), while RISC breaks tasks down and completes them in stages, which requires less individual capability (lower performance, lower power consumption), but at the cost of lower efficiency.
In 1985, the UK company Acorn Computers developed the Arm architecture, coinciding with Apple’s self-developed chips, leading to a fruitful collaboration, and thus Arm was born. It wasn’t until nearly 20 years later, with the advent of Apple’s A-series chips for the iPhone, that the Arm architecture finally made a significant mark in the mobile processor market.
The development of RISC-V has been even more tortuous. The RISC architecture was invented in 1971 by Turing Award winner David Patterson, who later saw the evolution from RISC-I to RISC-IV, but it never gained significant attention.
David Patterson (left) in 1981
In 2010, Professor Krste Asanović from UC Berkeley decided to develop an open-source computer system, excluding x86 from consideration and finding Arm too expensive. He then recruited David Patterson, leading to the birth of RISC-V.
The terms “open source” and “modifiable” can almost summarize the fundamental differences between RISC-V and Arm:
If we liken chip architecture to martial arts techniques, Arm is the martial arts manual that outsiders can read for a fee but cannot modify freely; RISC-V is akin to a martial arts master’s training notes, open for revision by various practitioners.
The benefits of modifiability were difficult to realize in the past, but with the arrival of the software-defined product era, the demand for software-customized chips has surged, especially in the Internet of Things (IoT) and automotive sectors. The flexibility of chip architecture can help terminal manufacturers balance performance and cost.
However, the more immediate significance is that due to RISC-V being open source and free, and not tied to any institution, it fundamentally eliminates the possibility of being “choked” by external restrictions. In 2015, the Berkeley team announced the establishment of the RISC-V Foundation, emphasizing its neutral mission. RISC-V thus became the hidden alternative for developers concerned about “architecture hegemony.”
In 2019, with the arrival of US sanctions, RISC-V’s status as an alternative rapidly became prominent. Besides Pingtouge mentioned earlier, companies like Huami Technology in Xiaomi’s supply chain and Huawei’s HiSilicon also developed chip products based on RISC-V architecture, making RISC-V a hot topic in China.
Moreover, the idea of using RISC-V as an alternative was not limited to Chinese chip companies.
Arm is Not a “Bodhisattva”
In August 2022, Arm filed a lawsuit against its major client Qualcomm, triggered by Qualcomm’s recent acquisition of Nuvia. The latter was founded by chip engineers from Apple and Google, who developed a series of high-performance CPU cores after obtaining Arm’s authorization.
According to Qualcomm’s original plan, it aimed to launch a custom CPU core named “Oryon” based on Nuvia technology by the end of that year, to compete with Apple’s M-series in the PC market.
However, Arm objected, claiming that Qualcomm’s use of Nuvia’s technology, which was based on Arm’s authorization (which was stopped in March 2022), infringed its interests, demanding Qualcomm either destroy the chips or provide financial compensation.
Arm’s licensing agreements fall into two categories: the first is the Technology License Agreement (TLA), where customers purchase Arm’s IP and can make some modifications; a typical example is Qualcomm’s Snapdragon series;
The second is the Architecture License Agreement (ALA), where customers purchase the Arm instruction set architecture and develop their own IP and processor cores based on it, with Apple being a typical representative. The conflict centers around Nuvia, which had signed an ALA with Arm before being acquired, and developed IP based on Arm architecture. Qualcomm believes it has the right to directly use Nuvia’s IP based on its existing TLA with Arm, while Arm insists that Qualcomm must obtain its consent first (and pay again) or pay an additional fee directly.
This dispute highlights Arm’s vulnerability: despite being a cornerstone of mobile infrastructure, it lacks corresponding “taxation rights.”
The status of chip architecture derives more from “ecosystems”: how many downstream customers are willing to adopt this architecture for chip design.
The success of x86 comes from Intel’s insistence on compatibility. In the 1980s, Professor Ken Sakamura from the University of Tokyo proposed an ambitious TRON plan as an IT consultant to the Japanese government, aiming to establish a Japanese version of a CPU + operating system ecosystem. However, unlike Intel’s compatibility route, Sakamura believed that Intel sacrificed CPU performance for compatibility and should develop an architecture and ecosystem from scratch.
Clearly, Intel’s route has proven successful. Like TRON, IBM’s Power architecture also sacrificed compatibility in pursuit of performance and similarly fell short against Intel.
Intel CEO Paul Otellini delivers silicon wafers to Steve Jobs, 2006
The barriers of “ecosystems” arise from “two-sided scale effects”: for instance, as more chips adopt the Arm architecture, the number of software developers and users around the Arm architecture increases, which in turn makes new chip companies and developers more inclined to adopt the Arm architecture.
A similar example is that as Meituan’s user base expands, merchants are more inclined to settle on Meituan; as more merchants join, users are also more inclined to use Meituan. However, a key premise is that Meituan’s delivery fees and commissions remain within a reasonable range.
Moreover, most of Meituan’s customers are small and medium-sized businesses, whileArm‘s customers are wealthy and powerful chip giants.
Ultimately, the Arm architecture resembles a representative elected by chip companies; if Arm raises prices or poaches business (which it has already started doing), chip companies will have the incentive to vote for a new representative.
Similarly dependent on “ecosystems” are the Android system and NVIDIA’s CUDA; the former is open-source, while the latter is theoretically free but tied to NVIDIA’s GPUs. At this point, the benefits of RISC-V being free and open-source become evident.
RISC-V, Once Again Selected
The current RISC-V Foundation is a star-studded assembly, with members like Google and IBM from the community period, now joined by NVIDIA, Micron, NXP, Western Digital, and even Qualcomm, which has been most affected by Arm’s actions, showing a visible willingness among chip design companies to switch to RISC-V.
Members of the RISC-V Foundation; Image source: SemiWiki
Recently, Qualcomm, along with NXP, Infineon, and other automotive chip giants, established a company in Germany aimed at promoting RISC-V architecture chips, with the first target being automotive chips, and gradually expanding into mobile and IoT sectors.
Another potential game-changer for RISC-V’s development is the legendary figure Jim Keller.
As a living legend in Silicon Valley, Jim Keller led the development of AMD’s Athlon series processors in the late 1990s, leveling the playing field between AMD and Intel and causing Intel to abandon its 4GHz Pentium 4 development plan.
After moving to Apple (PA Semi, acquired by Apple in 2008), Jim Keller created the A4, the first of the A-series processors. He later returned to AMD and successfully led the development of the Zen architecture processors, turning the tables on Intel.
In 2020, the active job-hopper Jim Keller graduated from Intel. Having seemingly worked at every major Silicon Valley company, he turned to a little-known Canadian startup, Tenstorrent.
This company mainly produces AI chips based on RISC-V architecture, and Jim Keller joined as CTO, later becoming CEO three years later—this was his first time as CEO in his career.
Jim Keller’s involvement lends significant momentum to RISC-V’s journey to legitimacy, but the experience of another company warns us that ascending from an alternative status is not easy.
The Lesson of MIPS
Before RISC-V emerged, Arm’s biggest competitor was MIPS.
MIPS, like Arm and RISC-V, originated from the previously mentioned RISC architecture and was developed during the rise of PCs in the 1980s. While Acorn Computers was developing the Arm architecture, Stanford University’s former president John LeRoy Hennessy and his team founded MIPS, both launching their first-generation architectures in 1985.
While Acorn relied on a single order from Apple to survive, MIPS had begun to reap commercial rewards, with its third product, the R3000, launched in 1988, selling over 10 million units and breaking into the gaming market with Sony’s PlayStation. It then released the first 64-bit processor, the R4000, entering the server and supercomputer markets, becoming the primary threat to x86.
John Hennessy (center) inspects the layout of the MIPS R2000, 1986
However, MIPS subsequently entered a downward spiral, with control changing hands multiple times over two decades. In 2018, Wave Computing, which acquired MIPS from Imagenation, eliminated licensing fees, emulating RISC-V by making the MIPS architecture completely free and open-source, yet this could not reverse its decline. Ultimately, Wave Computing announced the cessation of development and joined the RISC-V Foundation.
MIPS and Arm both have IP licensing and architecture licensing models, but their approaches differ significantly:
Arm prefers customers to adopt IP directly without altering the architecture, while MIPS encourages architectural innovation from customers.
MIPS’s philosophy seems to grant developers the most freedom, but it inadvertently raised the threshold for chip design.
If we liken chip design to building with blocks, Arm’s approach is to provide various parts for consumers to assemble; MIPS’s approach gives consumers various pieces of wood to design their own parts, which is considerably more challenging.
Moreover, establishing an architecture essentially sets universal rules for hardware and software, allowing chips, operating systems, and software designed according to these rules to be combined with minimal adjustments for compatibility.
In contrast, MIPS’s encouragement of architecture licensing, which allows clients to add and modify instructions, essentially relinquishes some degree of this universal rule (standardization), resulting in fragmentation, where different segments of the industry operate independently, making it difficult to build a cohesive ecosystem. An architecture that changes frequently can become a ship of Theseus, complicating ecosystem development.
Both MIPS and RISC-V are open-source architectures, with RISC-V being free. While the entry barrier for developers has been lowered, this may lead to even more severe instruction set architecture fragmentation.
Thus, supporters of the RISC-V camp have consistently sought to balance customization and standardization:
One approach is to transform “unlimited freedom” into “limited freedom”:
For instance, proposing instruction set modification standards that consider software compatibility and encourage hardware developers to modify instructions according to these standards to address the compatibility issues stemming from open-source architectures.
A typical example is Alibaba’s Pingtouge Xuantie C908, which passed RISC-V’s compatibility testing based on its instruction set modification standards, meaning most third-party software developers need not worry about software compatibility issues.
Another approach is to enhance the base instruction set so that developers do not need to add modifications:
For instance, if there is a high enthusiasm among developers for implementing a certain function, the foundation may consider adding a standardized version of that instruction to the base instruction set, so developers do not need to supplement instructions individually.
Currently, with the intentional guidance of the RISC-V Foundation and its major members, both approaches are being implemented, but the road ahead is long.
References
[1] Why RISC-V Is Succeeding, Semiengineering
[2] RISC-V grows open source processor membership 130% in 2021, VentureBeat
[3] The relationship between instruction sets, architectures, processors, and cores, CSDN
[4] All are RISC architectures; how will RISC-V challenge ARM? With the Non-Net
[5] RISC-V vs. ARM vs. x86 – What’s the difference? Microcontroller tips
[6] MIPS is dead, turns to RISC-V, CSDN
[7] RISC-V entry, Wikipedia
[8]MIPS entry, Wikipedia
Editor: Li Motian
Editor-in-Chief: Li Motian
