Solid State Drives (SSDs) are continuously capturing the storage market due to their advantages of fast read speeds, low power consumption, and high data security. In particular, enterprise SSDs (eSSDs) appear to be safe and worry-free due to stringent quality control and multi-level power loss protection in data centers. However, unexpected power outages can lead to data loss if data is not promptly written to the SSD, or if frequent hot-swapping generates instantaneous high voltage and surge currents, causing significant losses for industries reliant on data centers such as AI, finance, telecommunications, and the internet.
As a supplier that has been deeply involved in the field of power loss protection (PLP) for many years and the first in the industry to provide integrated PLP functionality in PMIC solutions, Qorvo leverages its technological and experiential advantages to help customers eliminate the aforementioned concerns.
With the surge in AI application demands, Qorvo stands out in the PLP field
With the explosive growth of AI technology, global data centers are rapidly evolving towards large-scale, high-performance architectures, with data center sizes expanding exponentially. Relevant data indicates that global AI server shipments are expected to grow by 46% year-on-year in 2024, with a market size exceeding $187 billion, accounting for 65% of the total server market. It is anticipated that by the end of this year, the global AI server market size will reach $298 billion, accounting for over 70% of the entire server market.
The rapid growth of AI servers is driving an astonishing increase in eSSD demand, with a single server potentially requiring thousands of eSSDs. TrendForce data shows that the procurement capacity for AI-related SSDs will exceed 45EB in 2024, and in the coming years, AI servers are expected to drive an average annual growth rate of over 60% in SSD demand.
Qorvo Application Manager Zhang Junyue
“If every SSD is paired with a PMIC to achieve power loss protection and safeguard data integrity, it signifies a massive market. This also provides Qorvo with vast development space in the AI data center field.” According to Qorvo Application Manager Zhang Junyue, “Our solutions offer comprehensive protection features. On the software side, when abnormal input/output voltage or temperature exceeds limits, there will be warnings or error status registers for the main control to access, or it can notify the main control via GPIO in the form of interrupts to issue relevant protection system commands. On the hardware side, when such issues are detected, the system will immediately cut off the power supply, protecting the chip itself and preventing downstream devices from being affected by faults. Additionally, abnormal input or eFUSE overcurrent will trigger PLP backup power to ensure the system has enough time to back up data.”
Qorvo’s Power Loss Protection Principles and Solution Advantages
Qorvo’s PLP technology charges the energy storage capacitor when the input is normal. After the input energy is lost, the stored energy takes over the circuit within milliseconds, maintaining operation and providing sufficient time for the SSD controller and cache to back up data, ensuring data integrity.
Traditional SSDs built with discrete components require independent power supplies for flash memory chips, DRAM, controllers, and capacitors, along with a PLP protection chip, resulting in at least five power supplies. This, combined with numerous peripheral components, demands high board space, compresses storage chip area, affects data storage density, and increases procurement management difficulties, quality control risks, and costs.
Qorvo integrates PLP functionality into the power management IC (PMIC), achieving significant results:
1. Provides General-purpose input/output (GPIO) interfaces, making it easier to manage chip timing, voltage, and other functions. Additionally, any error information related to over-temperature, over-current, or over-voltage detected by the system or chip is sent to the main control via GPIO as an interrupt signal, preventing subsequent failures.
2. Utilizes the I2C communication protocol to operate registers, allowing real-time editing of timing and precise control of circuit delays to meet the startup and power-off timing requirements of DRAM modules, which is difficult to achieve with discrete components.
3. Significantly reduces development time, as customers can easily modify voltage, current, timing, GPIO, and other functions by simply re-editing the default functions of our integrated circuit (IC) and retesting. Discrete solutions typically require layout changes to test these system-level modifications.
Clearly, the PMIC solution with integrated PLP functionality optimizes the layout of peripheral devices, reduces the number of components, enhances design and debugging efficiency for engineers, simplifies component quality control and procurement management, frees up DRAM chip storage space, and increases storage density. Zhang Junyue stated, “Qorvo has been deeply involved in the field of highly integrated solutions for 15 years, accumulating relevant technologies that promote miniaturized design and integration, leading the industry.”
Two Products: ACT85411 and ACT85611 Architecture
Qorvo’s integrated PLP PMIC solutions include two models: ACT85411 and ACT85611, which are Qorvo’s first generation of integrated PLP products. Zhang Junyue pointed out that Qorvo has proactively defined these two leading products in response to market demands for miniaturization and increased storage density, becoming the first company in the industry to provide integrated PLP and PMIC solutions.
The functional block in the center of the display diagram shows all resources. The back-to-back eFuse switches above are used for surge limiting and front-end circuit protection during hot-swapping applications for eSSDs. Zhang Junyue emphasized that hot-swapping is essential for eSSD applications, as replacing SSDs in numerous cabinets and servers within data centers generates instantaneous high voltage and surge currents. Qorvo’s eFuse intelligently controls the soft-start slope to keep surge currents within reasonable limits, protecting chips and downstream devices.
On the left is the PLP circuit section, which stores input energy in the capacitor during normal operation. After the input power is lost, the stored energy is immediately discharged to maintain operation. Below is the GPIO interface, providing rich GPIO resources to configure various modes. The right side corresponds to the PMIC section, including DCDC circuits, such as Buck step-down or Boost step-up, to power the subsequent Flash and I/O.
ACT85611includes four efficient step-down regulators (three 4A and one 2A), with an output voltage range of 0.6-5.26V; a low-current step-down regulator (BuckVCC) for internal circuits and external loads (up to 100mA); a low-dropout linear power supply chip (LDO) supporting 300mA with an adjustable output voltage range of 0.6-3.75V; and a step-up regulator providing 10.8-13.2V output at 1A.
ACT85411features two 10A step-down regulators with an output voltage range of 0.6-5.26V; a fixed low-current step-down regulator for internal and external loads (up to 200mA) at 5V; and a step-up/down regulator with an output voltage range of 9.6-16V at 1A.
These two products are specifically designed for eSSD applications. However, due to their excellent programmability and flexibility, they contain numerous configurable registers that can be applied to other fields requiring PLP functionality, such as virtual reality head-mounted displays, medical devices, and industrial control.
Leading Advantages of Integrated PLP PMIC Solutions
The integrated PLP circuit ensures rapid backup power supply to the system at the moment of power loss, maintaining brief operation to ensure complete data backup; the hot-swapping protection function effectively addresses the instantaneous high voltage and surge currents caused by frequent plugging and unplugging operations in data centers, protecting chips and downstream devices, which is particularly advantageous in AI data center applications. Zhang Junyue enumerated several advantages of the integrated PLP PMIC solutions.
1. High integration: Qorvo integrates multiple functions into a small chip, eliminating dozens of discrete components on the circuit board, significantly reducing the bill of materials (BOM) item count and lowering costs.
2. High reliability: The integrated capacitor health monitoring function allows real-time monitoring of capacitor health status, providing timely replacement reminders and improving system reliability.
3. Leading capacitor capacity measurement accuracy: Improved measurement accuracy reduces the number of storage capacitors used, saving costs, especially against the backdrop of high prices for high-voltage storage capacitors.
4. Multiple configurable GPIO ports: Configurable system reset and communication between the main control, interrupt output error information, and debugging output voltage and timing, making the chip easy to apply to different SSDs without additional board changes or component replacements.
5. Optimized dynamic response performance: Optimizes the dynamic response performance of power rails supplying SoCs, maintaining stable voltage during high data throughput, indirectly enhancing data transfer rates.
ACT85411 and ACT85611 have already entered mass production and gained market recognition. Users can order through Qorvo’s distributors or e-commerce channels such as Mouser, RFMW, and Digikey, ensuring the safe operation of various AI data centers.
Currently, Qorvo has established partnerships with several leading SSD manufacturers, and the products have performed excellently in practical applications, receiving positive feedback from customers.
It is worth mentioning that Qorvo not only provides chips but also offers a complete set of support based on chip applications, including data manuals, evaluation board user manuals, and software GUI and programming tools that accompany the evaluation boards, assisting engineers in the design process and accelerating customer product market entry.
Technical Expansion: From SSD Field to Multi-Industry Applications
SSDs are a widely applicable and market-potential flash storage technology. The PMIC solution with integrated PLP not only performs excellently in the eSSD field but can also be applied to other areas requiring power loss protection through simple programming edits. Qorvo collaborates with data storage solution providers in the data center industry to offer design solutions around edge computing, network connection ports, optical module products, and more.
In the future, Qorvo will continue to monitor the storage market, actively follow user demands, and maintain its position as an industry leader.
END
2025 is referred to in the industry as the “Year of AI Agents”. From data lakes to flash storage, strong support will become crucial for building AI agents. On July 9, the 2025 Global Flash Summit will be grandly held in Nanjing, focusing on new technologies and trends to promote the vigorous development of the industry ecosystem.
