NVIDIA has built a moat with its GPU and CUDA ecosystem, leading countless companies to willingly pay high hardware costs and margins. This is because, during the technological exploration phase, the stability of computing power supply is far more important than cost-effectiveness.
However, as AI applications enter the stage of large-scale commercial use, those tech giants who were once indifferent to GPU prices are quietly turning their attention to more efficient customized solutions. Just as the evolution of Bitcoin mining transitioned from CPU to GPU and then to ASIC, as algorithm architectures gradually solidify, the flexibility of general-purpose computing chips becomes a constraint.
The sensitivity of cloud service providers to electricity costs and the stringent return on investment requirements from enterprise customers are driving a consensus: in today’s explosion of computing power demand, ASIC chips customized for specific scenarios may be the optimal solution to balance performance and cost.
01. Large Model Algorithms May Enter a Bottleneck Period
As AI applications enter the stage of large-scale commercial use, cost issues become increasingly prominent: training Grok3 consumes about 200,000 H100 GPUs (costing approximately $590 million), while the training cost for ChatGPT5 reaches $500 million, far exceeding the early investment of only $1.4 million for GPT3. This exponential growth is behind the limitations of the Transformer architecture: its secondary complexity Attention mechanism leads to a surge in computing power demand, and the pre-training dividend is gradually reaching its peak.
The essence of large models remains a statistical model based on probabilistic weights, and the balance between its “hallucinations” and expressiveness is always a challenge. From the perspective of information entropy, early capability improvements relied on technological optimization, while later stages are limited by data abundance—Grok3 and GPT5’s capabilities are already close to the mining limits under the current data environment. Although the capability ceiling under the Transformer architecture is gradually becoming apparent, breaking through the existing technical route remains fraught with uncertainty: if the threshold for new architectures needs to surpass GPT5, the industry’s entry barriers will significantly increase, potentially slowing down the pace of technological iteration.
Nevertheless, the application value of large models in vertical fields has been validated. In scenarios such as music creation and code generation, their efficiency improvements are significant, and some practitioners have already achieved commercialization through this. However, the concept of a “unified large model” is being broken—customized development of industry application tools may become mainstream. Leading companies in various industries prefer to embed AI modules into existing tools, balancing efficiency and system compatibility; for startup teams, accurately identifying niche demands and implementing solutions is more critical. For example, in the field of music generation, merely mastering large model technology is not enough; a deep understanding of musical characteristics is also required; the To C side faces dual challenges of charging models and traffic entry—giants control entry through free strategies and then monetize through other businesses, while breakthroughs for small and medium enterprises are more likely to focus on the To B field.
Currently, the capabilities of large models are no longer the core contradiction for industry implementation; how to convert technological advantages into practical application value in real scenarios is the key to determining the future landscape.
02. Is ASIC the Optimal Solution?
If we compare the chip world to a toolbox, then ASIC is the “professional craftsman” tailored for specific tasks. Unlike the GPU, which is a “jack of all trades” (capable of mining and running AI), ASIC (Application-Specific Integrated Circuit) is designed from the outset with a single goal in mind—like an electric screwdriver designed specifically for screwing, it can only screw, but its efficiency is a hundred times that of a regular screwdriver.
For example, in Bitcoin mining, early miners used CPUs for calculations, later discovering that GPUs had stronger parallel computing capabilities, but what truly industrialized mining was the ASIC miners launched by Bitmain. These chips dedicate all circuit resources to executing the SHA256 hash algorithm, effectively turning the entire chip into a “computing power perpetual motion machine,” with mining efficiency per unit energy consumption being in the thousands compared to GPUs. This extreme optimization results in: when the difficulty of the Bitcoin network skyrockets, only ASICs can maintain economic viability.
This characteristic is equally critical in the AI field. Although NVIDIA GPUs can handle various algorithms, when running the Transformer architecture, a large number of transistors are used for general computing rather than specific tasks. It’s like using a Swiss Army knife to cut vegetables; while it can be done, it is far less efficient than a professional chef’s knife. ASICs can allocate all circuit resources to core operations such as matrix multiplication and activation functions, theoretically achieving more than a tenfold improvement in energy efficiency.
The difference in operational costs is even more intuitive. An NVIDIA GPU consumes about 700 watts, with an hourly electricity cost of approximately 0.56 yuan (based on 0.8 yuan per kilowatt-hour) when running large models. In contrast, an ASIC chip with equivalent computing power can control its power consumption to under 200 watts, with the same task costing only 0.16 yuan per hour. For cloud service providers needing to deploy tens of thousands of cards, this difference could save tens of millions of kilowatt-hours annually—equivalent to the annual output of a small power plant.
However, the “specialization disease” of ASICs is also very apparent: once the algorithm is upgraded or the task changes, these customized chips may become “electronic waste.” Just like a lens designed specifically for film cameras is useless in the digital age. Therefore, they are more suitable for scenarios where algorithms are relatively solidified, such as cloud inference services and autonomous driving perception systems that require long-term stable operation.
The current AI industry is facing a critical turning point: as the training costs of large models soar from the tens of millions in the GPT3 era to the tens of billions for Grok3, even tech giants are beginning to reassess their technical routes. Just as the shift from CPU to GPU occurred, it may now be time for GPUs to give way to more specialized ASICs.
03. Domestic Design Service Providers Are Likely to Benefit Significantly
Custom accelerated computing chips (ASICs) are becoming the core driving force behind the AI computing power revolution. It is predicted that by 2028, the global market for custom accelerated computing chips will reach $42.9 billion, accounting for 25% of the accelerated chip market, with a compound annual growth rate of 45% from 2023 to 2028. This explosive growth is driven by the exponential increase in computing power demand from AI models: training clusters have evolved from tens of thousands of cards to hundreds of thousands, while inference clusters, although smaller in scale, will create a much larger market demand with millions of deployments.
Tech giants are accelerating their layout of self-developed ASICs to seize the opportunity. Google has launched the sixth-generation TPU Trillium chip, focusing on optimizing energy efficiency, planning to replace TPU v5 on a large scale by 2025, and breaking the previous model of only collaborating with Broadcom by adding MediaTek to form a dual supply chain, strengthening advanced process layout. Amazon AWS is focusing on the Trainium v2, co-designed with Marvell, while simultaneously developing Trainium v3. TrendForce predicts that its ASIC shipment growth rate will be the highest among American cloud service providers by 2025. After successfully deploying its first self-developed inference chip MTIA, Meta is working with Broadcom to develop the next-generation MTIA v2, focusing on energy efficiency and low-latency architecture to meet highly customized inference load requirements. Although Microsoft still relies on NVIDIA GPUs, its self-developed Maia series chips have entered the iteration stage, with Maia v2 being mass-produced by GUC and Marvell involved in the design of the advanced version to diversify technology and supply chain risks.
Chip design manufacturers are also welcoming growth opportunities. Broadcom’s AI semiconductor revenue is expected to exceed $4.4 billion in the second quarter of 2025, a year-on-year increase of 46%, benefiting from the deployment plans of three customers with million-level clusters, with inference demand expected to accelerate in the second half of 2026. Marvell’s 3nm XPU plan has secured advanced packaging capacity, set to start production in 2026, and is collaborating with a second hyperscale customer for iterative cooperation. The domestic market is also accelerating, with Alibaba’s Pingtouge launching the Hanguang 800 inference chip, Baidu Group building a self-developed ten-thousand-card cluster (Kunlun Chip Generation 3 P800), and Tencent Holdings forming a combined solution with its self-developed Zixiao chip and investment in Suir Technology.
The essence of this transformation is the shift of computing power supply from general-purpose to specialization. As AI applications enter the stage of large-scale implementation, ASICs, with their extreme optimization capabilities for specific algorithms, are redefining the cost structure and technical routes of computing power economics.
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