Future Military High-Performance Embedded Computing

Advanced processors, high-speed networking, and open system standards are converging, making military applications in target detection and tracking possible and giving artificial intelligence a new role.

State-of-the-art processors, rapid networking, data sharing, innovations in cooling and thermal management, and new system architectures are converging towards high-performance embedded computing systems, creating new technologies that support real-time processing, artificial intelligence (AI), and machine learning in applications such as image recognition, radar, electronic warfare (EW), and signals intelligence (SIGINT).

While these innovations bring almost unimaginable new aerospace and defense capabilities, they also present challenges for system designers regarding size, weight, and power (SWaP) packaging, electronic cooling, and data security, threatening to outpace the advantages expected from the open system standards ecosystem.

Many innovations in high-performance embedded computing begin with microprocessors, including central processing units (CPUs), field-programmable gate arrays (FPGAs), general-purpose graphics processing units (GPGPUs), analog-to-digital converters (A/D), and digital-to-analog converters (D/A).

Denis Smetana, senior product manager at Curtiss-Wright’s Defense Solutions division in Ashburn, Virginia, explains: “We have scalable processors for data centers. These processors have very high power consumption and are difficult to cool. Although Intel has secondary processors with server-like performance, known as the Xeon D series, their target is the embedded market.” The Curtiss-Wright CHAMP XD-4 embedded processor is an example.

Smetana continues, “The Xeon D brings server-level performance to the embedded market, connecting these circuit boards into a structure using 100 Gigabit Ethernet. One feature of the Xeon D is that you can scale up to 20 cores, with dual memory cores and I/O bandwidth four times that of previous generations of processors.”

Curtiss-Wright also offers an FPGA board called CHAMP FX-7, which has two AMD Versal FPGA-based systems on chip (SoCs) for combining floating-point processing with FPGA logic in adaptive systems. Smetana says, “Another option is GPGPU, which has a large array of processors. We have installed GPGPU on both the CHAMP XD-4 and CHAMP FX-7, running PCI Express at Gen-4 speeds, providing a 30 Gbyte data channel in both directions.”

The industry is seeing a growing demand for high-performance processors like FPGAs and GPGPUs. Mark Littlefield, director of systems products at Elma Electronic in Fremont, California, says, “The usage of GPGPU has increased significantly. While some are skeptical about high-speed Ethernet, these processors and switches can support time-sensitive embedded computing.”

Ken Grob, embedded technology director at Elma Electronic, agrees. “The use of GPGPU is becoming more frequent, and we see it applied in non-traditional use cases; GPGPU is increasingly used for video applications. We are also seeing GPGPU used for signal processing, employing algorithms previously implemented in FPGAs but now observed in GPGPUs. With GPGPU, you can achieve this faster with less overhead.”

Grob says, “In the past, there were no alternatives to FPGA in high-performance embedded computing, but today some system designers are turning to GPGPU. The dependencies become more challenging when transitioning from an FPGA environment to another environment. However, in FPGA, the algorithm is implemented in software, and from a software perspective, running on GPGPU libraries is much faster than porting from one FPGA environment to another in VHDL.”

Another challenge that GPGPU aims to address is the availability of human FPGA programmers. Littlefield from Elma points out, “FPGA development talent is both expensive and hard to find. There are not many people who have enough research on FPGA to become effective developers. It’s a completely different talent and a completely different beast.” Grob adds, “GPGPU performance is becoming increasingly powerful, opening doors for other alternatives.”

The two most influential high-performance networking architectures today are Ethernet and PCI Express (also known as PCIe). Today, embedded computing systems are evolving from third-generation PCI Express, which transmits 32 Gbyte of data per second, to fourth-generation PCI Express, which transmits 64 Gbyte of data per second. Leading designs are moving towards fifth-generation PCI Express, which transmits 128 Gbyte of data per second.

Bill Hawley, senior hardware engineer at Atrenne Computing Solutions in Brockton, Massachusetts, states, “We are now considering performance improvements from PCI Express third generation to fourth and fifth, as well as Ethernet. We see demand from PCI Express fourth and fifth generation customers, and I believe that demand continues. The need for bandwidth and speed will persist.” System designers typically use PCI Express links to connect components on circuit boards or when data movement must be as deterministic as possible.

When data is transferred between circuit boards or between chassis, Gigabit Ethernet is the default choice, with the option to increase from 10 Gigabit Ethernet to 40 Gigabit Ethernet to 100 Gigabit Ethernet and beyond.

Demand for higher network bandwidth is driven by stringent aerospace and defense applications. Hawley says, “Real-time applications are the driving force — information must be acquired and responded to as quickly as possible, approaching real-time speed. For radar applications, the sooner data is obtained, the better the radar can respond. That’s why we see a focus on performance.”

Ethernet has evolved from a hodgepodge of switching structure topologies (including Serial RapidIO, InfiniBand, Fibre Channel, StarFabric, and Firewire) into a data plane. Hawley from Atrenne says, “So far, everything we’ve seen is Ethernet or its derivatives, which are related to the data plane, using PCI Express on the expansion plane.”

“The data plane connects through packet switches, allowing all boards in the system to communicate via the data plane (i.e., Ethernet),” Hawley continues. “Ethernet is a very flexible architecture, but the problem is that it requires a lot of software intervention, so the latency of Ethernet packets can be significant. PCIe does not have this issue, as everything is handled in hardware, making it a good real-time solution, which is very different from situations with extensive software intervention.”

Littlefield from Elma states, “High-speed switching structures are now all turning to Ethernet.” “It is now built into FPGAs and GPGPUs. The biggest obstacles are determinism and latency, which are now being addressed through Time-Sensitive Networks (TSN). Network speeds are rapidly increasing, and in the next five to seven years, 400 Gigabit Ethernet will emerge.”

However, the road to Gigabit Ethernet is not smooth. Littlefield points out, “Implementing 100 Gigabit Ethernet is not simple. It has signal integrity issues, and aligning everything with circuit board products and backplane is a greater challenge. However, people today have adapted to this and are working hard to integrate all these pieces together.”

Aaron Frank, senior product manager at Curtiss Wright, states that the embedded computing industry’s shift from traditional data bus architectures to network architectures is driving the growth of Ethernet.

Frank says, “We have seen growth in 10, 40, to 100 Gigabit Ethernet technologies, driven by a network-centric approach, with more data being transmitted via Ethernet, and thus Ethernet will continue to grow.” However, Gigabit Ethernet only represents part of the path forward, as system designers cannot simply force data onto the network and expect the best results.

“Merely installing a 100 Gigabit network on a system is not enough,” Frank says. “In terms of results, the system must be able to collect, process, and transmit that much data. With the increasing use of optical interfaces, utilizing these faster speeds and interfaces is becoming a system-level end-to-end solution. We previously dealt with 1 Gigabit Ethernet, where copper could keep up, but now more interfaces are shifting to optical interfaces. We are doing a lot to make it easier for system integrators to use optical interconnects.”

The Sensor Open Systems Architecture (SOSA) and Modular Open Systems Approach (MOSA) design guidelines may be the most influential emerging open system standards in the high-performance computing field today. These standards seek to create an open ecosystem where components from many vendors can work well together, facilitating rapid upgrades over time and saving costs throughout the lifecycle of embedded computing systems.

“With SOSA, people can leverage technology faster,” Littlefield from Elma says. Although industry experts expressed skepticism about the value of SOSA standards from the outset, Littlefield states, “This skepticism has been put aside at this point.” “It took us three years to get to this point.”

The practicality of the SOSA standard and the MOSA design approach has been proven, convincing skeptics in the industry. Grob from Elma states, “The market now knows how to design.” “It provides a rich set of interoperable circuit boards, and when you really see that you can achieve this, it becomes a driver for time to market. We can integrate faster than ever before.”

Justin Moll, vice president of sales and marketing at Pixus Technologies in Waterloo, Ontario, Canada, states, “The main motivation behind proposing SOSA and MOSA is to enable several different vendors to provide interoperable components in various aerospace and defense systems. The demand for SOSA is primarily focused on their specific slot profiles and the subsets and combinations of these profiles that have many commonalities.”

Moll notes, “One popular item now is our chassis hardware manager that is SOSA compliant. If customers provide their own backplane, we provide the pins. The goal of the SOSA committee is to use similar design approaches to merge compatible chassis management hardware. These types of things are being raised in the SOSA committee and need to reach an agreement on connectors and pins. While not defined in the SOSA standard, the SOSA committee will define it.”

Moll also calls attention to a standard called Modular Open RF Architecture (MORA), which can be considered a sister standard to SOSA. This standard pertains to RF and microwave systems, rather than embedded processing. “This is where we develop standardized or open standard RF solutions. We have fortified many ubiquitous software-defined radios from National Instruments, designing them for outdoor use in weatherproof IP-67 versions, equipped with connectors that meet the military standard 38999 for signals intelligence, electronic warfare, and various communications and control for drone detection and deterrence using powerful software-defined radios.”

SOSA and MOSA are achieving expected results at Curtiss Wright. Frank from Curtiss Wright states, “Our systems are now aligned with SOSA and MOSA for multi-mission capabilities, allowing them to be used for one project and reconfigured for another operational mode, thus avoiding the investment in entirely different architectures.”

“This drives decisions and aligns with the MOSA approach. MOSA evolves into SOSA and seeks to effectively use standard interconnects across the industry to help reduce long-term support costs and technology refresh costs, i.e., total cost of ownership.”

In all potential aerospace and defense applications of future high-performance computing systems, “artificial intelligence cannot be overlooked,” says Chris Ciufo, chief technology officer at General Micro Systems in Cucamonga, California. “AI is entering the battlefield, with customers requesting us to build AI into systems.”

Ciufo states that the demand for AI is beginning to influence the architecture of today’s most advanced embedded computing systems. “In the past few years, we might have delivered similar mission computers by upgrading single-board computers with extra I/O. Now people want us to add a GPGPU, which is a vector coprocessor used alongside the general-purpose processor of the mission computer to create AI capabilities.”

Typically, the easiest way to add AI to embedded computing is to incorporate GPGPU capabilities into traditional microprocessors and FPGAs. GPGPU is essentially a massive parallel processor that can perform many computing tasks simultaneously.

Ciufo states, “AI means that you can now replace the computer with this system composed of GPGPU and CPU, allowing it to pull data from the sensor database, using AI algorithms to let the AI engine do what you want, such as face recognition, target tracking, and object identification.”

This GPGPU-based AI capability should also be able to apply AI-based image recognition to 2D images and infer details in their 3D images. Ciufo says, “You can now look at a 2D facial image and infer what the back of your head looks like based on your facial appearance. Imagine a soldier with a weapon or sensor, and this computer can fill in parts of the image you cannot see, knowing what is waiting for you around the corner. You can infer what a person hiding around a rock looks like.”

U.S. military experts are primarily focusing on modern machine vision capabilities on the assembly line—mainly to identify manufacturing defects by revealing details that typically should not exist in the image—and extending these capabilities to military operations. Ciufo states, “The current trend is that the U.S. Department of Defense sees the development of machine vision in the industrial market and wants it to have a multiplicative effect on the battlefield.”

“Look at the actionable intelligence we can obtain from embedded systems; we can become a more lethal force. We see a demand for mission computing using AI coprocessors more frequently than in the past.”

Today’s high-performance computing capabilities make AI applications far more feasible than decades ago. Littlefield from Elma states, “I believe AI will be applied on a large scale this time. The computational demands of deep learning are very high; deep learning was not really practical when chip hardware computational capabilities were slower. With the increase in chip computational power, people are now looking for more ways to leverage it.”

Littlefield states that the most promising applications of AI in the military include real-time target detection and identification. This could lead to self-defense systems on armored vehicles that can detect incoming fire, identify the type of weapon involved, and quickly respond or retaliate to avoid being hit.

Additionally, Littlefield states, “The Air Force is discussing swarms of drones controlled by one or multiple aircraft.” This capability will be built upon real-time target detection and identification.

Bill Conley, chief technology officer at Mercury Systems in Andover, Massachusetts, states that real-time embedded computing and AI are also influencing future electronic warfare systems. “With ongoing research into AI, the most advanced algorithms we can conceive will be deployed onto the battlefield.”

Conley notes that the U.S. Navy’s Advanced Electronic Warfare (ADVEW) suite for the F/A-18E/F Super Hornet carrier-based jet fighter enhances aircraft survivability. Conley states, “Fourth-generation aircraft must be able to perceive situations in the environment and not fly too close to threats if they are to protect themselves effectively. Pilots see many different radars, most of which are not threats, and they must find the radars that may pose a threat.”

This EW challenge is becoming increasingly significant. “In the past, you were looking for a needle in a haystack. Now you are looking for a needle in a pile of needles,” Conley says, relying on automated change detection, which is becoming very powerful. EW technology has been developed by humans, and now machines can measure substantial changes during missions, meaning EW systems are absorbing and using more data. Data fusion from many sources creates critical data that must flow, informing fusion algorithms.”

The urgent need for AI in future military applications indicates how quickly the nature of threats can change. Can the current technology levels of open system standards, fast processors, and high-speed networks meet the challenges? Conley from Mercury believes it is not that simple.

Conley states, “The systems used at the start of a war and those used at the end of a war are often very different.” “You need to focus on the speed of technology adoption. When you are in combat, open systems are far less important than bringing the best capabilities to the fight.”

The pace of establishing, approving, and industry acceptance of open system standards may simply be insufficient to meet the demands of future warfare. Conley asks, “How do we introduce innovation at speed and scale to change strategic outcomes and results? That’s where openness helps, but it may not be enough to fully address the issue on its own.”