Previously, I shared a wireless downloader based on the ESP32:Take Off! Download and Debug FPGA via Wireless Wi-FiHowever, it had a single function and required building hardware by yourself (which is not aesthetically pleasing). Today, I bring you another multifunctional (wireless) debugging tool – ESP32JTAG.
ESP32JTAG is a multifunctional tool for [embedded] [hardware engineers]. It integrates various essential debugging and development tools into one device. It supports on-chip debugging (OCD) for MCUs, FPGA development, logic analysis, UART terminal access, and all functions can run simultaneously, effectively replacing multiple USB adapters.It has a built-in web server that can connect wirelessly to a PC or smartphone via Wi-Fi, without the need for drivers or other software – configuration, usage, and documentation can all be easily handled through any web browser. The device runs GDBServer, OpenOCD, and OpenFPGALoader, and is compatible with mainstream IDEs and tools such as VSCode, Arduino, and STM32Cube.
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Four Tools in OneESP32JTAG is a versatile and widely applicable embedded system development and debugging tool. It features a USB Type-C power interface and a 1.83-inch LCD display that shows the IP address, Wi-Fi connection status, internal system status, and other useful information.
It has four independent I/O ports for connecting to target embedded systems and supports the following modes:
- MCU JTAG/SWD on-chip debugging (OCD) – suitable for ARM or other microcontrollers, running OpenOCD and Blackmagic Probe locally
- FPGA JTAG programming – for configuring or flashing FPGA
- XVC compatible JTAG – for debugging AMD/Xilinx FPGA via Vivado tools
- 2-wire UART interface – supports WebUART, with additional ADC input for target voltage monitoring and a GPIO for target reset control
- Logic analyzer with up to 16 channels – for digital signal capture
This tool can meet the needs when one port is used for UART monitoring of target voltage, another for SWD/JTAG (for ARM Cortex debugging), another for FPGA JTAG, and the last one as a 4-channel logic analyzer.
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Features and Specifications
Processor: Dual-core ESP32-S3 @ 266 MHzMemory: 16 MB Flash, 8 MB PSRAMConnectivity: Wi-Fi 6, Bluetooth 5.0, USBDisplay: 1.83-inch LCD (for IP, status, and information)FPGA: 5K gates, 1 Mbit RAM (CPU configurable)I/O: 4 configurable 4-wire portsPower: USB Type-CDimensions: 33 x 40 x 5 mm (1.3 x 1.57 x 0.2 inches)Operating System: FreeRTOSSupported Features:
- MCU JTAG/SWD debugging
- FPGA configuration/debugging
- UART with WebUART support
- Logic analyzer (up to 16 channels)
- Target voltage monitoring
- Reset control
- Web interface: configuration, firmware updates, status monitoring, and documentation without the need for drivers
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Open Source Links
The project is currently crowdfunding on Crowd Supply (https://www.crowdsupply.com/ez32/esp32jtag) and has not yet provided related open-source materials. The relevant code references are as follows:
- openocd-on-esp32 https://github.com/espressif/openocd-on-esp32
- blackmagic-debug https://github.com/blackmagic-debug/blackmagic
- openFPGALoader https://github.com/trabucayre/openFPGALoader
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ConclusionAlthough the project has not yet been open-sourced, the overall project concept is still worth referencing, and many functional codes can be found on GitHub.