The Edge AI chip is a processor specifically designed to efficiently run artificial intelligence algorithms on terminal devices such as smartphones, IoT devices, and autonomous vehicles. Through hardware-level optimization, they can achieve low power consumption and high real-time AI computing, forming the core hardware foundation for edge AI applications.
Why do we need edge AI chips? As AI technology continues to evolve, traditional chips reveal limitations. While CPUs and GPUs are versatile, they have relatively low energy efficiency and struggle to meet the stringent power consumption requirements of mobile devices. Relying on cloud computing can lead to issues such as latency, privacy concerns, and network stability. In contrast, dedicated edge AI chips offer significant advantages, including high energy efficiency, low latency, privacy protection, and offline operation capabilities.
The core technologies of edge AI chips encompass architecture design and key technological innovations. In terms of architecture design, the NPU (Neural Processing Unit) is considered the heart of edge AI chips. It is an accelerator specifically designed for neural networks, such as Huawei’s Ascend NPU and Apple’s Neural Engine, supporting parallel computing and low-precision operations like INT8/FP16.
Furthermore, heterogeneous computing architecture is commonly adopted in modern edge AI chips, integrating various computing units such as CPUs, GPUs, NPUs, and DSPs (Digital Signal Processors) to handle different types of computing tasks. Qualcomm’s Hexagon is a typical representative of this architecture.
In terms of key technological innovations, quantization computing supports low-precision operations like INT4/INT8, effectively improving energy efficiency, with MediaTek’s APU serving as an example. Sparse acceleration technology can skip the computation of zero-value weights, as seen in Tesla’s Dojo chip. Memory-compute integration technology can reduce data transfer power consumption (i.e., in-memory computing, such as memory-compute integrated chips). Dynamic scheduling technology can dynamically allocate computing power based on task load, exemplified by ARM’s Ethos NPU.
What are the mainstream edge AI chip manufacturers and their products? Here are some well-known manufacturers and their products. Huawei’s HiSilicon Ascend series is aimed at edge inference AI chips, such as the Ascend 310; the Kirin SoC integrates an NPU, like the Kirin 9000, which can support AI tasks on mobile devices.
Qualcomm’s Snapdragon mobile platform supports edge AI in some models, such as the Snapdragon 8 Gen 2, which integrates the Hexagon processor with computing power exceeding 60 TOPS; the QCS series is aimed at IoT devices, with AI chips like the QCS8250 supporting 15 TOPS of computing power.
MediaTek’s Dimensity series integrates AI processors that can support edge AI tasks.
Apple’s A-series and M-series chips integrate neural network engines, with the A17 Pro achieving 35 TOPS of computing power and the M2 chip reaching 15.8 TOPS.
Samsung’s Exynos series, such as the Exynos Auto V series, is aimed at automotive AI chips, with computing power exceeding 10 TOPS.
Intel’s Movidius VPU is optimized for visual AI, such as the Myriad X, which supports 4 TOPS of computing power.
Horizon Robotics’ Journey series targets autonomous driving and smart cockpit applications, with the Journey 5 achieving 128 TOPS of computing power.
Cambricon’s MLU series, such as the MLU220, supports 8 TOPS of computing power and is aimed at edge inference.
Allwinner Technology’s V/R series, such as the V853, integrates an NPU with 1.2 TOPS of computing power, suitable for smart cameras.
Rockchip’s RK3588 has a built-in 6 TOPS NPU, supporting flagship-level edge computing.
Currently, the development of edge AI chips faces several challenges: in terms of energy efficiency balance, mobile devices need to achieve TOPS-level computing power with power consumption below 1W; in algorithm adaptation, chips need to support cutting-edge algorithms like dynamic sparsity and mixed precision; in development barriers, there are compatibility issues between vendor-specific toolchains (like Huawei’s MindSpore Lite) and general frameworks (like TensorFlow Lite); in terms of fragmented ecosystems, differences in NPU instruction sets and compilers among different manufacturers lead to high porting costs.
From a development trend perspective, as the complexity of AI models increases, the computing power of edge AI chips will continue to enhance while maintaining low power consumption. Edge AI chips will support the fusion processing of multimodal data (such as images, voice, and sensor data), thereby expanding richer application scenarios. Lightweight models (like MobileNet and EfficientNet) and Neural Architecture Search (NAS) technology will further optimize edge AI performance. The collaboration between edge AI chips and cloud AI will become the mainstream model, with complex tasks handled by the cloud and real-time tasks completed by edge devices.
In summary, edge AI chips are the core hardware driving the implementation of AI technology in terminal devices, and their development will have a profound impact on various fields such as smartphones, smart wearables, autonomous driving, and industrial IoT. Despite currently facing some challenges, the future of edge AI chips will undoubtedly move towards higher computing power, lower power consumption, stronger security, and richer application scenarios.
Disclaimer: This article is originally from Electronic Enthusiasts. Please cite the source above when reprinting. For group discussions, please add WeChat elecfans999, for submission of interview requests, please email [email protected].
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