The programming principle of Flash is that it can only write 1 as 0, but cannot write 0 as 1. Therefore, before programming Flash, the corresponding block must be erased, and the erasure process is to write all bits as 1, turning all bytes in the block into 0xFF. Thus, programming can be said to be the process of writing 0 to the corresponding bit, while erasing is the process of writing 1 to the corresponding bit; the execution processes of the two are completely opposite.
(1) The Basic Units of Read and Write Operations in Flash Chips are Different
The application program operates on NorFlash chips using “words” as the basic unit. To facilitate the management of large-capacity NorFlash memory, NOR flash is usually divided into logical blocks of size 128KB or 64KB, sometimes further divided into sectors within the block. When reading and writing, both the logical block number and the offset within the block need to be specified. The application program operates on NandFlash chips using “blocks” as the basic unit. The blocks of NAND flash are smaller, generally 8KB, and each block is divided into pages, with a page size typically of 512 bytes. To modify a byte in the NandFlash chip, the entire data block must be rewritten.
(2)NorFlash is a random access medium suitable for smaller amounts of data; NandFlash is a sequential access medium suitable for storing larger data.
(3)Because NorFlash has separate address and data lines, it can be connected to data lines like SDRAM. The usage of NOR chips is similar to that of conventional memory chips, with high transfer efficiency. Executable programs can run directly on the chip (XIP, eXecute In Place), allowing applications to run directly in flash memory without needing to load the code into system RAM. Due to this feature, NOR chips are often used as boot chips in embedded systems. NandFlash shares address and data buses, requiring additional connections for control input and output, making it more difficult to use NAND chips as boot chips.
(4)Due to the shared address and data bus in NandFlash chips, it does not allow for clearing data at a byte or even block level, only allowing for zeroing a fixed size area; NorFlash chips can operate at the word level. Therefore, when processing small data I/O operations, the speed is faster than that of NorFlash. For example, writing a word to a NorFlash chip typically takes 10us, while writing 512 bytes on a 32-bit bus takes 1280us; writing 512 bytes to NandFlash takes: 512×50ns per byte + 10us page seek time + 200us chip erase time = 234us.
(5)NandFlash has a larger capacity, with maximum capacities reaching 8GB. For easier management, NandFlash storage uses a two-level storage system of blocks and pages, meaning its storage space is two-dimensional. For example, the K9F5608UOA flash block size is 16K, with each page being 512 bytes, and each page has a 16-byte free area for storing error correction codes (also known as out-of-band, OOB space). When performing write operations, NandFlash places one byte of data into an internal cache before issuing a “write command”. Since operations on NandFlash are based on blocks and pages, the speed of NAND is faster than that of NOR for large data read and write operations.
(6)Reliability
NorFlash has higher reliability than NandFlash because the interface of NorFlash is simpler, with fewer data operations and bit swapping operations, resulting in higher reliability and fewer bad blocks. It is generally used in applications requiring high reliability. NandFlash, on the other hand, has a more complex interface and operations, with many bit swapping operations. Critical data requires error detection/correction (EDC/ECC) algorithms to ensure data integrity, leading to a much higher chance of issues and unavoidable bad blocks. Additionally, since bad blocks are randomly distributed, even error correction cannot address them.
(7) NandFlash generally shares address and data lines, which affects read/write speed; NORFlash has separate data and address lines, making read/write operations relatively faster.
Commonalities Between NANDFlash and NORFlash Chips
First, writing data to the chip must first clear the corresponding content in the chip before writing, meaning erase before write. However, NORFlash only needs to erase a word, while NAND requires erasing the entire block. Secondly, the number of erase cycles for flash memory is limited. When flash memory approaches its lifespan, write operations often fail; when the lifespan is reached, data stored in flash can be read but not written. To prevent these issues, a specific area should not be repeatedly written. Typically, NandFlash can be erased more times than NorFlash, but since NandFlash usually requires entire block erasure, if one bit fails in a page, the entire block fails. Due to the complexity of the erasure process, the failure rate is relatively high, so overall, NOR has a longer lifespan.
Another commonality is that the read/write operations of flash memory are not merely physical operations; actually, storing data on flash must be implemented using algorithms, typically in the MTD (Memory Technology Drivers) module of the driver program or in the FTLZ (Flash Translation Layer). The specific algorithms relate to the chip manufacturer and model. Comparatively, NAND is more suitable for complex file applications, but due to the complexity of using NAND chips, there are higher requirements for the file system.
(8) Interface Comparison
NorFlash has a universal SRAM interface, which can easily connect to the CPU’s address and data bus, requiring low interface demands from the CPU. NorFlash’s feature is execute-in-place (XIP), allowing applications to run directly in flash memory without needing to load code into system RAM. For instance, the read-only section in uboot can run directly on NorFlash, with only the read-write and zero-initialization sections needing to be copied to RAM for execution.
NandFlash devices use complex I/O ports to serially access data, with 8 pins used to transmit control, address, and data information. Due to the complex timing, it is generally best for the CPU to integrate a NandFlash controller. Additionally, since NandFlash is not connected to the address bus, if one wants to use NandFlash as a system boot disk, the CPU must have special functionality. For example, the S3C2410 automatically reads 4k data from NandFlash to SRAM at address 0 when selected for NandFlash boot mode. If the CPU lacks this special function, users cannot directly run code on NandFlash; other methods may be needed, such as many development boards using NandFlash also employing a small NorFlash to run boot code.
(9) Capacity and Cost Comparison
Compared to NandFlash, NorFlash has a smaller capacity, generally around 1~16MByte. Some new processes using chip stacking technology can increase the capacity of NorFlash. In terms of price, NorFlash is generally more expensive than NandFlash; for example, a 4Mbyte AM29lv320 NorFlash is priced around 20 yuan, while a 128MByte k9f1g08 NandFlash is priced around 30 yuan. The production process for NandFlash is simpler, allowing the NAND structure to provide higher capacity within a given mold size, thereby lowering prices.
(10)
Bad blocks in NandFlash devices are randomly distributed. Previous efforts to eliminate bad blocks found that the yield was too low and the cost too high, making it not worthwhile. Nand devices require an initialization scan of the medium to discover bad blocks and mark them as unusable. In manufactured devices, if this process cannot be reliably performed, it will lead to a high failure rate. The bad block issue does not exist in NorFlash.
In terms of bit flipping (a bit occurrence), the occurrence rate of NAND is much higher than that of NorFlash. This issue can be fatal when storing critical files in flash, so it is recommended to use verification algorithms like EDC/ECC when using NandFlash.
(11) Upgrade Comparison
Upgrading NorFlash is more troublesome because different capacities of NorFlash have different address line requirements, making it inconvenient to replace different capacity NorFlash chips. Typically, we solve this by making some jumper resistors on the circuit board’s address lines for different capacities of NorFlash. In contrast, the interfaces of different capacities of NandFlash are fixed, making upgrades simple.
(12) Read/Write Performance Comparison
Write Operation: Any flash device’s write operation can only occur in empty or erased units.
NAND devices perform erase operations very simply, while NOR requires all bits in the target block to be written as 1 before erasing.
Erasing NOR devices is done in blocks of 64~128KB, with an erase/write operation taking about 5 seconds.Erasing NAND devices is done in blocks of 8~32KB, with an erase/write operation taking at most 4ms.
Read Operation: NOR’s read speed is slightly faster than NAND.
(13) File System Comparison
The Linux system uses MTD to manage different types of Flash chips, including NandFlash and NorFlash. Common file systems that support running on Flash include cramfs, jffs, jffs2, yaffs, and yaffs2. The cramfs file system is a read-only file system. For read/write operations on Flash, we typically choose jffs or jffs2 file systems for NorFlash, and yaffs or yaffs2 for NandFlash. The Yaffs2 file system supports large pages (greater than 512 bytes/page) of NandFlash memory.
Source: http://www.cnblogs.com/zlhff/p/5411460.html
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