In July 2025, at the RISC-V China Summit, NVIDIA’s Vice President of Hardware Engineering, Frans Sijstermans, declared, “We are porting CUDA to the RISC-V architecture,” which stirred a global wave in the AI computing field. This decision signifies that the CUDA platform, which has long supported only the proprietary x86 and ARM architectures, is now opening its doors to open-source architectures for the first time. Meanwhile, RISC-V, a completely open-source processor architecture not controlled by any single country, will be able to seamlessly schedule NVIDIA’s GPU computing power as a host processor for the first time.
NVIDIA announced this news at the 2025 RISC-V Summit / News report imageFrom a Closed Ecosystem to Open Computing
NVIDIA’s embrace of RISC-V is essentially a key step in its transformation from a hardware supplier to a computing paradigm definer, and it has been a long-term technical foreshadowing of eight years: since co-hosting the first RISC-V seminar outside North America with Shanghai Jiao Tong University in 2017, NVIDIA has quietly laid out its plans for open-source architecture. At that time, RISC-V was merely an exploratory project in academia, yet NVIDIA had already embedded it into the embedded controllers of its GPUs. Eight years later, the cumulative shipment of NVIDIA’s MCU chips based on RISC-V has surpassed one billion units, validating its reliability in industrial applications.The technical breadth of this CUDA porting is remarkable, covering four core components:Toolchain Layer: Remapping the CUDA Toolkit compiler to the RISC-V instruction setDriver Layer: Dual optimization of kernel mode and user mode driversFramework Layer: Instruction set adaptation for AI frameworks like PyTorchAcceleration Libraries: Cross-architecture porting of over 900 CUDA core librariesAt the system architecture level, NVIDIA demonstrated a “three-horse carriage” model: the RISC-V CPU is responsible for operating system and task scheduling, the GPU focuses on parallel computing, and the DPU (Data Processing Unit) handles network data streams. This heterogeneous architecture leverages the advantages of each unit while achieving efficient collaboration through CUDA.Deeper industry motivations lie in breaking the “architecture dependency trap.” Previously, CUDA was only bound to the x86/ARM architectures, placing NVIDIA in a passive position during strategic adjustments of Intel/AMD’s CPUs. By incorporating RISC-V, NVIDIA achieves full coverage of the three mainstream architectures, significantly enhancing its ecological discourse power.Choosing to announce this strategy in China carries profound significance. Currently, the U.S. Department of Commerce has intensified export controls on AI chips to China, and NVIDIA’s cutting-edge AI chips like the GB200/GB300 have been placed on the embargo list. By embracing the RISC-V ecosystem led by China, NVIDIA can maintain ties to the Chinese market within a compliant framework.The Advanced Challenges of Open Architectures
Although RISC-V’s support for CUDA is a milestone, its capacity for high-performance computing still faces three technical paradoxes:(1) Conflict between Openness and StandardizationThe core advantage of RISC-V—customizability of the instruction set—poses a barrier to its server-level applications. Currently, key standards such as the RISC-V server platform specification (RVA23), memory tagging extensions, and matrix operation instruction sets are not yet fully developed, leading to low interoperability among implementations from different vendors. This fragmented state fundamentally contradicts the standardization required by data centers.(2) Performance and Ecosystem Circular DilemmaCurrently, commercial RISC-V processors (such as the SiFive P550) have single-core performance that is only 35% of that of the contemporaneous ARM Neoverse V3, with generational gaps in key technical indicators such as AIA interrupt control and IOMMU virtualization. This performance shortfall hinders the development of the developer ecosystem: although RISC-V has supported Linux and 75 mainstream software packages, the adaptation rate for AI-optimized frameworks is less than 20%.(3) System Bottlenecks in Virtualization CapabilityThe lack of a unified virtual memory (UVM) model results in data exchange efficiency between CPU and GPU being 40%-60% lower than that of x86 platforms; meanwhile, the weakness of virtual monitors and debugging tools further restricts the feasibility of cloud computing deployments.These challenges reveal the core laws of the semiconductor industry: architectural replacement requires a ten-year cycle. As history shows with x86 replacing mainframes and ARM’s resurgence in the mobile sector, RISC-V must cross the dual thresholds of “performance critical point” and “ecosystem critical point” to truly threaten traditional architectures.
NVIDIA chips / Report image from South China Morning PostSelf-Controlled Computing Power Game
According to Morgan Stanley’s report “China AI: The Awakening of the Sleeping Giant,” a key prediction states that China’s self-sufficiency rate for AI GPUs will soar from 34% in 2024 to 82% by 2027. Behind this figure is the strategic mission assigned to RISC-V.China has natural advantages in developing RISC-V: the massive data generated by its 1.4 billion population, the construction of the world’s largest nuclear power cluster to ensure energy demand for computing power, and the 47% of the world’s top AI researchers. These factors form a golden triangle for developing self-sufficient chips.Huawei’s Ascend chips are the vanguard in this breakthrough battle. Its Ascend 910C chip, manufactured with a 7nm process, although a generation behind NVIDIA’s Blackwell architecture in performance, has achieved independent architectural innovation. In 2024, Huawei’s R&D investment will reach 179.7 billion yuan, accounting for 20.8% of its revenue, with a significant portion directed towards chip development.On the technical front, Chinese companies are adopting a pragmatic strategy of “hybrid computing”: older NVIDIA GPUs working in tandem with domestically produced accelerator cards, alleviating hardware supply pressure while allowing time for self-sufficient chips to iterate. This “two-legged” approach has become a creative solution to cope with technological blockades.The cost control capabilities of Chinese AI companies are also astonishing to the West. The generative AI company DeepSeek has developed a large model comparable to ChatGPT, with training costs of only $5.6 million—less than a fraction of OpenAI’s similar model. This extreme efficiency is rewriting the economics of AI.The Shift of Power in Computing Architectures
The essence of CUDA supporting RISC-V is the disruption of the traditional chip power structure in the era of software-defined hardware. This game is reconstructing the rules of three major industries:(1) Deconstruction of Hardware LeadershipAs CUDA becomes a cross-architecture computing abstraction layer, the architectural choice of CPUs is significantly weakened. Intel/AMD lose their monopoly advantage of the “x86+CUDA” combination, while ARM faces a second trust crisis after the failed NVIDIA acquisition. Startups like Tenstorrent are seizing the edge computing market with RISC-V customized AI chips (such as Wormhole n300).(2) Redefinition of Closed and OpenNVIDIA’s “openness” is essentially a carefully designed expansion of its closed ecosystem. CUDA remains a proprietary platform, with RISC-V being just one of its hardware carrier choices. This contrasts with AMD’s ROCm ecosystem, which has achieved true open-source support for RISC-V, but with a significant gap in ecological maturity.(3) Pragmatic Evolution of China’s Technological PathChina has chosen a “scenario-driven innovation” approach: not blindly pursuing peak computing power, but focusing on vertical field optimization:Huawei provides BYD with automotive-grade Kirin chips to achieve localization of smart cockpitsAlibaba’s Pingtouge launches RISC-V vision processing chips for industrial quality inspection scenariosPinggao Co., Ltd. releases a fully domestically produced AI all-in-one machine equipped with a 12nm Jiangyuan D10 accelerator cardThis path difference reflects a fundamental ideological divide: the U.S. pursues technological hegemony, while China builds technological sovereignty.(4) Comparison of Different Paths in Technological Competition
The Rise of a Multipolar Computing Power System
The semiconductor industry is entering a “post-globalization era,” with three deterministic trends forming:(1) The Leap Window for RISC-VBy 2024, global shipments of RISC-V chips will exceed 10 billion units, with China contributing over 50%. However, achieving breakthroughs in data centers requires crossing the following technical milestones:Commercialization of the RVA23 server specification by 2027Mass production of 3D chip stacking technology by 2030, breaking through memory bandwidth bottlenecksIncreasing single-core performance to 80% of contemporaneous ARM levels within five years(2) Connection Points in Ecological FragmentationEven in the context of parallel evolution of the U.S. and China technology systems, open-source standards remain a scarce connecting bridge. The RISC-V International Foundation has attracted members from opposing camps, such as the Chinese Academy of Sciences, Intel, and Huawei, to jointly formulate standards, forming a de facto technology neutral zone.(3) Reconstruction of Computing Power EconomicsThe cost innovations of Chinese companies are changing the rules of AI economics: DeepSeek’s development of a ChatGPT-like model has training costs of only $5.6 million, less than one-fifth of OpenAI’s. When performance gaps are offset by cost advantages, the global AI industry landscape will face a reshuffle.
According to the report “AI Market Size Share and Trends from 2025 to 2034” published by Precedence Research, the global AI market size is expected to reach $757.58 billion in 2025 and approximately $3.68 trillion by 2034, with a compound annual growth rate of 19.20% from 2025 to 2034 / Screenshot from Precedence Research official websiteNVIDIA’s decision to adapt RISC-V reflects the core contradiction of the semiconductor industry: the irreconcilability of technological globalization and geopolitical fragmentation. As RISC-V begins to run CUDA programs and Huawei’s Ascend chips drive 80% of China’s AI computing power, the global semiconductor industry is entering a new era of multipolar coexistence, ecological fragmentation, and mutual penetration.
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