What is a Bus?
A bus is a common communication line for transmitting information between various functional components of a computer, consisting of a bundle of wires.
In fact, a bus is an internal structure that serves as a public channel for information transfer between the CPU, memory, input, and output devices.
To simplify hardware circuit design and system structure, engineers often use a set of lines configured with appropriate interface circuits to connect various components and peripheral devices; this shared connection line is referred to as a bus.
Additionally, adopting a bus structure facilitates the expansion of components and devices, especially when a unified bus standard is established, making interconnection between different devices easier.
Classification of Buses
Buses can be classified into five main types based on function and specification: data bus, address bus, control bus, expansion bus, and local bus.
The data bus, address bus, and control bus are collectively referred to as the system bus, which is what is commonly meant by the term bus. Common data buses include ISA, EISA, VESA, PCI, etc.
Address Bus: It is specifically used to transmit addresses. Since addresses can only be sent from the CPU to external memory or I/O ports, the address bus is always unidirectional and tri-state, which differs from the data bus. The number of bits in the address bus determines the size of the memory space that the CPU can directly address.
Control Bus: It is used to transmit control signals and timing signals. Some control signals are sent from the microprocessor to memory and I/O interface circuits; others are feedback from other components to the CPU, such as interrupt request signals, reset signals, bus request signals, device ready signals, etc.
Based on the method of data transmission, buses can be divided into serial buses and parallel buses. In a serial bus, binary data is sent bit by bit through a single data line to the destination device; parallel buses typically have more than two data lines. Common serial buses include SPI, I2C, USB, and RS232.
Based on whether the clock signal is independent, buses can be classified as synchronous and asynchronous. Synchronous buses have clock signals independent of data, while asynchronous buses derive clock signals from the data. SPI and I2C are synchronous serial buses, while RS232 uses an asynchronous serial bus.
In microcomputers, buses generally include internal buses, system buses, and external buses. The internal bus connects peripheral chips within the microcomputer to the processor for first-level interconnection; the system bus connects plug-in boards to the system board for second-level interconnection; the external bus connects the microcomputer to external devices, allowing the microcomputer to exchange information and data with other devices, facilitating third-level interconnection.
With so many classifications, the author can only choose one to introduce, so I will choose internal buses, system buses, and external buses.
Internal Bus
I2C Bus: The I2C (Inter-IC) bus was introduced by Philips over a decade ago and has become a widely adopted new bus standard in the field of microelectronic communication control.Comprehensive Analysis of the I2C Communication Protocol
It is a special form of synchronous communication, characterized by fewer interface lines, simplified control methods, smaller device packaging, and relatively high communication speeds. In master-slave communication, multiple I2C bus devices can be connected to the I2C bus simultaneously, identified by their addresses.
SCI Bus: The Serial Communication Interface (SCI) was also introduced by Motorola. It is a general-purpose asynchronous communication interface (UART) that is fundamentally similar to the asynchronous communication function of the MCS-51.
IIS: I2S (Inter-IC Sound Bus) is a bus standard established by Philips for audio data transmission between digital audio devices.Digital Audio Signal Transmission Protocol: I2S Protocol
I2S has three main signals:
1. Serial Clock SCLK, also known as bit clock, corresponds to each bit of digital audio data, with one pulse for SCLK.
2. Frame Clock LRCK, used to switch between left and right channel data. LRCK of “1” indicates that the data being transmitted is for the left channel, while “0” indicates that the data is for the right channel.
3. Serial Data SDATA, which represents audio data in binary two’s complement. Sometimes, to better synchronize between systems, an additional signal MCLK, known as the master clock or system clock, is also transmitted.
SPI: SPI (Serial Peripheral Interface) was first defined by Motorola in its MC68HCXX series processors.Comprehensive Analysis of the SPI Communication Protocol
SPI interfaces are primarily used between EEPROM, FLASH, real-time clocks, AD converters, as well as between digital signal processors and digital signal decoders.
SPI interfaces operate in a master-slave mode, typically involving one master device and one or more slave devices, with the following four signal types:
(1) MOSI – Master Out Slave In
(2) MISO – Master In Slave Out
(3) SCLK – Clock signal generated by the master device
(4) /SS – Slave Select signal controlled by the master device.
UART: UART (Universal Asynchronous Receiver Transmitter) converts parallel data transmitted from within the computer into an output serial data stream.Understanding UART Communication Through Waveform Analysis
It converts incoming serial data from external sources into bytes for use by devices that require parallel data within the computer. The output serial data stream includes parity bits, and parity checks are performed on the data received from external sources.
Start and stop markers are added to the output data stream, and start and stop markers are removed from the received data stream. It handles interrupt signals generated by devices such as keyboards or mice (which are also serial devices).
It can manage synchronization issues between the computer and external serial devices. Some high-end UARTs also provide input and output data buffers. Common signals include TXD, RXD, /RTS, /CTS.
JTAG: JTAG (Joint Test Action Group) is an international standard testing protocol (IEEE1149.1 compatible), primarily used for internal chip testing.
The standard JTAG interface consists of four lines: TMS, TCK, TDI, and TDO, which are mode select, clock, data input, and data output lines, respectively. The test reset signal (TRST, generally active low) is usually an optional fifth port signal.
A CPU with a JTAG Debug interface module can access the internal registers of the CPU and devices connected to the CPU bus, such as FLASH, RAM, and registers of built-in modules like UART, Timers, GPIO, etc., as long as the clock is functioning properly.
CAN: CAN stands for “Controller Area Network,” which is one of the most widely used field buses internationally.Learning the CAN Communication Protocol
Initially, CAN was designed for microcontroller communication in automotive environments, exchanging information between various electronic control units (ECUs) in vehicles, forming an automotive electronic control network.
For example, the engine management system, transmission controller, instrument equipment, and electronic backbone systems all embed CAN control devices. A single network composed of CAN buses can theoretically connect countless nodes.
In practical applications, the number of nodes is limited by the electrical characteristics of the network hardware. For instance, when using the Philips P82C250 as a CAN transceiver, up to 110 nodes are allowed on the same network.
CAN can provide data transmission rates of up to 1Mbit/s, making real-time control very easy. Additionally, the hardware’s error detection features enhance CAN’s resistance to electromagnetic interference.
SDIO: SDIO is an extension interface of the SD type, which can connect not only SD cards but also devices that support the SDIO interface; the port’s purpose is not limited to inserting storage cards.
Devices such as PDAs and laptops that support the SDIO interface can connect to devices like GPS receivers, Wi-Fi or Bluetooth adapters, modems, LAN adapters, barcode readers, FM radios, TV receivers, RFID readers, or digital cameras that use the SD standard interface.
GPIO: GPIO (General Purpose Input Output) or bus expanders simplify the expansion of I/O ports using industrial standard I²C, SMBus™, or SPI™ interfaces.Detailed Explanation of the Working Principle of STM32 Microcontroller GPIO
When a microcontroller or chipset lacks sufficient I/O ports, or when the system requires remote serial communication or control, GPIO products can provide additional control and monitoring functions.
System Bus
ISA Bus: The ISA (Industrial Standard Architecture) bus standard was established by IBM in 1984 for the launch of the PC/AT machine, hence also known as the AT bus.
It is an extension of the XT bus to accommodate 8/16-bit data bus requirements. It was widely used during the 80286 to 80486 era, to the extent that ISA bus slots are still retained in modern Pentium machines. The ISA bus has 98 pins.
EISA Bus: The EISA bus was jointly launched in 1988 by Compaq and nine other companies. It is based on the ISA bus, using a dual-layer socket, adding 98 signal lines to the original 98 signal lines of the ISA bus, effectively adding one EISA signal line between every two ISA signal lines.
In practical use, the EISA bus is fully compatible with ISA bus signals.
VESA Bus: The VESA (Video Electronics Standards Association) bus was launched in 1992 by 60 accessory card manufacturers as a local bus, abbreviated as VL (VESA Local Bus).
Its introduction laid the foundation for the innovation of microcomputer system bus architecture. This bus system considers the direct connection between the CPU and main memory and cache, usually referred to as the CPU bus or main bus, while other devices connect to the CPU bus through the VL bus, hence the VL bus is called a local bus.
It defines a 32-bit data line, which can be expanded to 64 bits through expansion slots, using a 33MHz clock frequency, with a maximum transmission rate of 132MB/s, capable of synchronous operation with the CPU. It is a high-speed, efficient local bus that supports 386SX, 386DX, 486SX, 486DX, and Pentium microprocessors.
PCI Bus: The PCI (Peripheral Component Interconnect) bus is currently one of the most popular buses, introduced by Intel as a local bus.
It defines a 32-bit data bus, which can be expanded to 64 bits. The PCI bus motherboard slot is smaller than the original ISA bus slot, with significantly improved functionality compared to VESA and ISA, supporting burst read and write operations, with a maximum transmission rate of 132MB/s, and can support multiple peripheral devices simultaneously.
The PCI local bus is not compatible with existing ISA, EISA, or MCA (Micro Channel Architecture) buses, but it is not limited by the processor and is developed based on new-generation microprocessors like Pentium.
External Bus
RS-232-C Bus: RS-232-C is a serial physical interface standard established by the Electronic Industries Alliance (EIA) in the United States.Detailed Explanation of RS232, RS485, RS422
RS stands for “Recommended Standard,” 232 is the identification number, and C indicates the revision number. The RS-232-C bus standard has 25 signal lines, including a main channel and an auxiliary channel; in most cases, the main channel is primarily used, and for general duplex communication, only a few signal lines are needed, such as one for sending, one for receiving, and one for ground.
The RS-232-C standard specifies data transmission rates of 50, 75, 100, 150, 300, 600, 1200, 2400, 4800, 9600, 19200 baud per second.
The RS-232-C standard allows drivers to have a capacitive load of 2500pF, and communication distance will be limited by this capacitance. For example, using a communication cable with 150pF/m capacitance, the maximum communication distance is 15m; if the capacitance per meter of cable is reduced, the communication distance can be increased. Another reason for the short transmission distance is that RS-232 uses single-ended signal transmission, which is susceptible to common ground noise and cannot suppress common-mode interference, so it is generally used for communication within 20m.
RS-485 Bus: The RS-485 serial bus standard is widely used when communication distances range from several dozen meters to thousands of meters.
RS-485 uses balanced transmission and differential reception, thus having the ability to suppress common-mode interference. Additionally, the bus transceiver has high sensitivity, capable of detecting voltages as low as 200mV, allowing the transmission signal to be recovered over kilometers.
RS-485 operates in half-duplex mode, meaning that only one point can be in the sending state at any time, so the sending circuit must be controlled by an enable signal.
RS-485 is very convenient for multipoint interconnection, allowing for the elimination of many signal lines. Using RS-485 can create a distributed system that allows for a maximum of 32 drivers and 32 receivers to be connected in parallel.
IEEE-488 Bus: The IEEE-488 bus is used to connect systems, such as microcomputers, digital voltmeters, digital displays, and other instruments, which can be assembled using the IEEE-488 bus.
It transmits signals in a bit-parallel, byte-serial, bidirectional asynchronous manner, with a bus connection method, allowing instruments to be directly connected to the bus without the need for intermediary units, but a maximum of 15 devices can be connected to the bus.
The maximum transmission distance is 20 meters, with a typical signal transmission speed of 500KB/s and a maximum transmission speed of 1MB/s.
USB Bus: The Universal Serial Bus (USB) is a new interface standard jointly launched by seven world-renowned computer and communication companies, including Intel, Compaq, Digital, IBM, Microsoft, NEC, and Northern Telecom.
It is based on universal connection technology, enabling simple and fast connections for peripherals, aiming to facilitate users, reduce costs, and expand the range of PC-connected peripherals. It can provide power to peripherals, unlike traditional devices using serial and parallel ports that require separate power systems.
Additionally, with the recent popularity of automotive electronics, the author would like to discuss the LIN and CAN Buses in automotive networks:
As early as 1983, Bosch began developing the Controller Area Network (CAN) bus, and the relevant protocol was officially released in 1986. Currently, there are various automotive bus standards, but CAN remains the most popular standard. In a CAN network, all nodes (originating from different ECUs) act as master nodes (i.e., there is no master-slave topology), and specific addresses are not assigned. Instead, messages carry identifiers.
At any given time, multiple nodes can send data to the CAN bus simultaneously. The message identifier helps determine the priority of the messages.
The highest priority message will cause the CAN bus to enter a dominant state, and all other nodes will stop sending.
These nodes are essentially transceivers, which can not only send messages but also retrieve specific messages from the bus based on their specific functions. Therefore, information flow occurs between different nodes connected to the CAN bus.
Due to CAN’s error checking for fill errors, bit errors, checksum errors, frame errors, and acknowledgment errors, it has high reliability.
CAN supports data transmission rates of up to 1Mbps, making it the default choice for connecting critical ECU functions in vehicles (e.g., transmission, temperature sensors, etc.).
Differences Between LIN and CAN
The role of automotive electronics is not limited to these critical units. The body electronics market has been growing for years. Typical body control applications include seats, windows, intelligent wipers, and automotive air conditioning sensors.
The key requirement for body electronics is to ensure that vehicles are more comfortable and safer. Although these systems may not require the high reliability of critical ECUs, they still need certain automotive network communication standards.
Implementing CAN is more costly than implementing LIN. Factors contributing to the higher cost of CAN include:
- Each node in the CAN network requires a clock generator or crystal;
- The chip-level implementation of CAN is more complex;
- Use of dual-wire transmission;
Most importantly, the entire expensive architecture is overly extravagant for applications that do not require high reliability and high data rates.
That concludes the comprehensive overview of various buses; I hope it is helpful to engineers.
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