From July 16 to 19, the fifth RISC-V China Summit was grandly held in Shanghai. The event featured a main forum, sub-forums, workshops, and an exhibition area, attracting representatives from hundreds of companies, research institutions, and open-source communities worldwide to discuss the latest developments in the RISC-V ecosystem and the future of the industry.
ChipSiYuan showcased its self-developed RISC-V + BLE ultra-low power MCU solution, injecting new technological vitality into the health sector.
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On the morning of July 18, during the embedded systems sub-forum of the summit, Gao Tingting, the R&D director of ChipSiYuan, provided an in-depth analysis of this RISC-V architecture-based BLE MCU, explaining how it breaks through the technical bottlenecks in the health sector:
01
RISC-V Open Instruction Set
Combining Cost Reduction and Performance Optimization
The RISC-V open instruction set can significantly reduce chip design costs and enhance performance. Its transparent openness allows companies to deeply optimize instruction paths, eliminating redundant modules to improve efficiency. Additionally, the modular design of RISC-V provides companies with a diverse selection of instruction sets, which can be flexibly combined with basic integer instruction sets and specific extended instructions according to the actual needs of products like wearable devices, further improving resource utilization and meeting the dual demands of cost control and performance optimization in the industry.
02
Dual-Core Heterogeneous and Low-Power Architecture
Integration of Long Battery Life and Strong Performance
The product adopts a dual-core heterogeneous architecture of RISC-V and DSP, achieving efficient collaboration in data processing and hardware acceleration of communication protocols. The RISC-V core focuses on algorithm processing, while the DSP core accelerates communication protocols. The dual cores can independently adjust clock frequencies, optimizing resource allocation and reducing power consumption. Furthermore, through strategies such as sub-threshold design, DVFS technology, and SRAM retention mode, the chip’s power consumption can be further reduced. Based on 22nm FD-SOI technology, the chip’s power consumption in deep sleep mode is only 600nA, and in SRAM retention mode, it is just 2.1μA, providing reliable support for long-endurance scenarios such as chronic disease monitoring.
03
Chip-Level Encryption Engine
Comprehensive Protection of Health Data Security
This BLE MCU integrates a high-performance encryption engine that supports both symmetric and asymmetric encryption algorithms, covering internationally recognized algorithms such as AES, ECC/ECDSA, as well as national cryptographic algorithms like SM2/4. Equipped with a true random number generator, it ensures the unpredictability of encryption keys. Additionally, the chip supports medical security standards such as SESIP and DTSec, achieving end-to-end encryption protection from data generation to transmission, effectively preventing data leakage risks.
The RISC-V + BLE ultra-low power MCU has broad application prospects in wearable health monitoring, portable medical devices, and smart environmental monitoring. In the future, ChipSiYuan will continue to deepen its RISC-V architecture, continuously optimizing the performance of the BLE MCU and expanding its application scope in the health sector, injecting more innovative momentum into the industry.