Bus Technology Overview

A bus, known in English as “BUS”, is very much like a public bus. For instance, the route of a public bus is fixed, and anyone can take the bus to any stop along that route. If we compare people to electronic signals, this is the real meaning of why it is called “BUS” instead of “CAR”. Professionally speaking, a bus is a structural form that describes the transmission lines of electronic signals; it is a collection of signal lines and a common channel for information transmission between subsystems. Through the bus, information can be transmitted, exchanged, shared, and logically controlled among all components within the system. In a computer system, it serves as the common channel for the CPU, memory, and input/output devices to transfer information. Various components of the host are connected through the host, while external devices are connected to the bus via corresponding interface circuits.

The development of modern network information, particularly concerning cost and space, has made bus transmission a hot topic, replacing point-to-point transmission. Its emergence provides the greatest convenience and the most effective technical solutions for information transmission.

Data Bus: Transmits data information

Address Bus: Transmits address information

Control Bus: Transmits control information (completes bus operation functions)

Power Line: Provides power signals for the system

1. Data Transmission Function

The data transmission function is the basic function of the bus, represented by the bus transmission rate, which is the number of bytes transmitted per second, measured in Mbps (megabytes per second).

2. Multi-Device Support Function

Multiple devices use a single bus. The first issue is bus occupancy rights, which determines which master device can claim the bus, decided by the bus arbiter.

3. Interrupts

Interrupts are the mechanism by which a computer responds to urgent tasks. When an external device makes a service agreement with the master device, the interrupt serves as the contact signal for implementing the service agreement.

4. Error Handling

Error handling includes the detection and processing of errors such as parity errors, system errors, and battery failures, as well as providing corresponding protective measures.

1. Request Bus Occupation

The bus master device (such as CPU, DMA controller, etc.) that needs to use the bus submits a request to the bus arbitration entity. If the response conditions are met, the bus arbiter will issue a response signal and grant the bus control rights for the next bus transmission cycle to the applicant.

2. Addressing

The bus master device that obtains bus control rights sends out the addresses of the memory and I/O ports to be accessed through the address bus, selects the accessed module via address decoding, and starts data conversion.

3. Data Transmission

The bus master device is also known as the master module, while the accessed device is called the slave module. The operation between the master module and the slave module is controlled by the master module, which transmits data between the two slave modules via the data bus.

4. Termination

Information from both the master and slave modules is removed from the bus, releasing the bus for use by other master modules.

On-Chip Bus

It is the bus located between various unit circuits within large-scale and ultra-large-scale integrated circuits, serving as an information pathway among these unit circuits, such as the bus between the CPU’s ALU, register group, and controller.

Local Bus (also known as Internal Bus)

Typically refers to the information pathway between components on a microcomputer motherboard. As it is a bus within a single circuit board, it is also known as a local bus on the board. Typical local buses include the IBM-PC bus, ISA bus, EISA bus, VL, and PCI buses.

System Bus (also known as External Bus)

Refers to the bus on the microcomputer baseboard, used to form the channels between various plug-in boards of the microcomputer system and CPU modules in multi-processor systems. Typical system buses include STD-BUS, MULTI-BUS, VME, etc.

Communication Bus

This bus serves as the information pathway between microcomputer systems and other instruments or devices. This type of bus is often not exclusive to computers and borrows bus standards from other fields of electronic industry. Popular communication buses include EIA-RS-232C, RS-422A, RS-485, IEEE-488, VXI, etc.

Relationship Between Various Buses

1. Simplified Software and Hardware Design: Since bus definitions are very strict, any manufacturer or individual must produce plug-in boards according to its standards, which greatly simplifies the design process for users.

2. Simplified System Structure: By adopting a standard bus, any functional module (board) can be easily connected to the bus to form the hardware system of a microcomputer.

3. Easy System Expansion: For microcomputer systems built using standard buses, as long as the plug-in boards are designed according to bus standards and user expansion requirements, they can be easily added to the bus slots for expansion.

4. Easy System Update: With the continuous development of electronic technology and the emergence of new devices, microcomputer systems also need to be updated continuously. Using new devices to replace the original ones on standard bus plug-in boards can easily improve system performance without major modifications.

There are many ways to classify buses, such as external and internal buses, system buses and non-system buses, etc.

1. By Function

The most common classification is based on the function of the data bus, which can be divided into address bus, data bus, and control bus. In some systems, the data bus and address bus can be shared under address latching control, i.e. multiplexed.

The address bus is specifically used to transmit addresses. In the design process, the most common should be selecting external memory storage addresses from the CPU address bus. The bit width of the address bus often determines the size of the memory storage space; for example, a 16-bit address bus can address a maximum storage space of 2^16 (64KB).

The data bus is used for transmitting data information and can be divided into unidirectional and bidirectional data buses. Bidirectional data buses typically use a three-state form. The bit width of the data bus usually matches the word length of the microprocessor. For example, the Intel 8086 microprocessor has a word length of 16 bits, and its data bus width is also 16 bits. In practice, the data transmitted on the data bus does not necessarily represent complete data.

The control bus is used to transmit control signals and timing signals. For example, when the microprocessor operates on external memory, it must first send read/write signals, chip select signals, and interrupt response signals through the control bus. The control bus is generally bidirectional, and its transmission direction is determined by specific control signals, with its bit width depending on the actual control needs of the system.

2. By Transmission Method

Buses can be divided into serial and parallel buses based on the method of data transmission (based on various bus technology design circuit collections). In principle, parallel transmission is superior to serial transmission; however, it incurs higher costs. In simple terms, parallel transmission is like a multi-lane highway, while serial transmission is like a single-lane road. Common serial buses include SPI, I2C, USB, IEEE1394, RS232, CAN, etc.; while parallel buses are relatively fewer, commonly including IEEE1284, ISA, PCI, etc.

3. By Clock Signal Method

Buses can be classified into synchronous and asynchronous buses based on whether the clock signal is independent. The clock signal of synchronous buses is independent of the data, meaning a separate line is used for the clock signal; while the clock signal of asynchronous buses is extracted from the data, typically using the edges of data signals as clock synchronization signals.

According to the previous definition of the bus, its basic function is to transmit signals, ensuring that information from various subsystems can be transmitted effectively and promptly. To avoid mutual interference between signals and prevent physical space from becoming too crowded, the best method is to use multiplexing technology. Thus, the basic principle of bus transmission is multiplexing technology. Multiplexing refers to a mechanism where multiple users share a common channel. The most common types are Time Division Multiplexing (TDM), Frequency Division Multiplexing (FDM), and Code Division Multiplexing (CDM).

Time Division Multiplexing (TDMA)

Time division multiplexing segments the channel into multiple time slots, where signals from different sources request responses in different time slots, and the transmission times of each signal do not overlap on the time axis.

Frequency Division Multiplexing (FDMA)

Frequency division multiplexing divides the available frequency bandwidth of the channel into several non-overlapping frequency bands, with each signal occupying one of these bands after frequency modulation, allowing different frequency signals to be transmitted over the same channel. When the receiving end receives the signal, it uses appropriate bandpass filters and frequency demodulators to restore the original signal.

Code Division Multiplexing (CDMA)

In code division multiplexing, each transmitted signal has its specific identification code or address code. The receiving end distinguishes the transmitted information on the common channel based on these codes, and only information with matching identification or address codes will be received.

The main technical indicators for evaluating a bus are its bandwidth (i.e., transmission rate), data bit width (bit width), operating frequency, and the reliability and stability of data transmission.

Bandwidth (Transmission Rate), Bit Width, and Operating Frequency

The bandwidth of the bus refers to the amount of data transmitted on the bus in a unit of time, specifically the maximum data transfer rate per second in MB. The bit width of the bus refers to the number of binary data bits that can be transmitted simultaneously, or the concept of the width of the data bus, such as 32 bits, 64 bits, etc.; the wider the bus bit width, the greater the data transmission rate, and the wider the bus bandwidth. The operating clock frequency of the bus is measured in MHz and is related to the transmission medium, the signal amplitude, and the transmission distance. Under the same hardware conditions, the frequency used for differential signal transmission is often much higher than that of single-ended signals due to the amplitude of differential signals being only half that of single-ended signals.

The bandwidth, bit width, and operating frequency of the bus are closely related, and their relationships are as follows:

Reliability of Data Transmission

Reliability is the most critical parameter for evaluating a bus. Without reliability, the transmitted data would be incorrect, which negates the practical significance of the bus. To improve bus reliability, common measures include:

1. Using a data frame sender to listen to the bus before sending data frames, allowing data frames to be transmitted only when the bus is idle, thus avoiding data collisions between different nodes.

2. Using twisted pair differential signals to transmit data, reducing the voltage swing of single lines and minimizing high-order harmonics generated by signal edges.

3. Ensuring that the edges of the data have a certain slope.

4. Adding matching resistors and capacitors to reduce signal transmission and balance the distributed capacitance on the bus.

5. Adopting appropriate network topologies and shielding technologies to reduce interference from other signals.

STD System Bus

1. Modular small board structure, open and flexible configuration

The STD bus divides the microcomputer system into several modules and produces them as standard functional templates (plug-in cards). Users can choose functional templates to assemble their microcomputers. Plug-in cards can be connected to peripherals using other methods, making it flexible and convenient to form microcomputer systems that meet different requirements.

2. High reliability, strong anti-interference capability, and high signal quality

The excellent physical characteristics of the STD bus enable it to withstand harsh environments. Its modular small size structure provides resistance to shocks and vibrations, and it also reduces self-generated heat issues. Additionally, the STD bus uses printed circuit board edges for connectors, preventing plug-in cards from being inserted backwards and avoiding bent or broken pins. The structure of the STD bus allows signals to flow orderly from the bus interface to the user interface, improving signal quality.

3. Compatible structure, supporting products, and comprehensive functions

The compatible structure of the STD bus allows 8-bit STD products to work alongside new standard 16-bit or 32-bit STD products. The STD bus also supports multi-processor systems. With the advancement of technology and the promotion and application of STD products, the functionality of standard plug-in boards continues to enhance, and supporting products are increasingly abundant, greatly facilitating users.

RS-232C Communication Bus

RS-232C is a standard for serial communication buses and serves as the interface standard between data terminal equipment (DTE) and data communication equipment (DCE). It was established in 1969 by the Electronic Industries Alliance (EIA) based on CCITT’s remote communication standards. The purpose of this standard is to ensure the compatibility of devices produced by different manufacturers, meaning that any device with an RS-232C standard interface can connect without needing any conversion circuits. However, this standard only guarantees hardware compatibility, not software compatibility.

The RS-232C standard includes mechanical and electrical specifications, where the mechanical specifications dictate that the RS-232C standard interface connector (pins and sockets) is a 25-pin “D” type protective shell.

Main Characteristics of RS-232C

1. Fewer signal lines: The RS-232C bus has a total of 25 lines, including two channels for duplex communication. In practical applications, most only use the main signal channel (i.e., the first channel) and only a few signals (typically 3 to 9 lines).

2. Long transmission distance (compared to parallel): Due to the serial transmission method of RS-232C and the conversion of TTL levels to RS-232C levels, the distance can reach 30m during baseband transmission. If using optical isolation with a 20A current loop, the transmission distance can reach 1000m. Of course, if a modem is added to the serial interface, the distance can be even greater.

3. Multiple selectable transmission rates: The standard transmission rates specified by RS-232C include: 50, 75, 110, 150, 300, 600, 1200, 2400, 4800, 9600, 19200 baud. It can flexibly be used with devices at different rates.

4. Strong anti-interference capability: RS-232C uses negative logic, where idle states are represented by any voltage between +3V and +25V for logic “0”, and any voltage between -3V and -25V for logic “1”. It transmits without idle return to zero, which significantly enhances anti-interference capability.

RS-422A Bus

RS-422A uses a balanced output transmitter and a differential input receiver. The transmitter has two output lines, where one line jumps to a high level while the other line jumps to a low level, thus flipping the voltage polarity between the lines. Sending signals on the RS-422A line requires two lines, and receiving signals also requires two lines. For duplex communication, at least four lines are needed. Because RS-422A lines are fully balanced, they generally do not use a common ground line. This minimizes interference caused by different ground potentials between the communicating parties. Common mode interference caused by different ground potentials is filtered out by the differential receiver, whereas such interference can lead to errors in RS-232C lines.

RS-485 Bus

The RS-485 bus uses interface circuits for full-duplex communication, requiring two pairs of lines or four lines, increasing the line cost. RS-485 is suitable for communication where both parties share a pair of lines and is also suitable for bus networking among multiple points using a pair of lines, where communication is half-duplex.

Since a single line is shared, only one transmitter is allowed to send data at any given time, while other transmitters must remain in a high-impedance (off) state, controlled by the send enable terminal on the transmitter chip. For example, when this terminal is high, the transmitter can send data, while when it is low, both output terminals of the transmitter present a high-impedance state, as if they are disconnected from the line.

IEEE 488 Bus

IEEE 488 is a parallel external bus developed by HP in the 1970s. In 1975, IEEE recommended it as the IEEE-488 standard bus, and in 1977, the International Electrotechnical Commission (IEC) recognized and recommended it, naming it IEC-IB. Therefore, this bus is also known by various names, including IEEE-448, IEC-IB (IEC Interface Bus), HP-IB (HP Interface Bus), or GP-IB (General Purpose Interface Bus). The introduction of the IEEE-448 bus allows for the establishment of a computer-controlled testing system without the need for complex control circuits. The IEEE-488 system primarily consists of rack-mounted intelligent instruments, forming an open modular testing system, making it one of the most widely used communication buses in industry today.

The conventions for using the IEEE-488 bus include: 1. Data transmission rate ≤ 1MB/S. 2. The number of devices connected to the bus (including the microcomputer acting as the controller) ≤ 15. 3. The maximum distance between devices ≤ 20M. 4. The total length of the entire system’s cable ≤ 220M; if the cable length exceeds 220M, timing relationships may be altered due to delays, leading to unreliable operation. In such cases, modems should be added. 5. All digital exchanges must be digitalized. 6. The bus specifies the use of a 24-wire combination plug and uses negative logic, where a voltage level less than +0.8V represents logic “1”; and a voltage level greater than 2V represents logic “0”.

The operational modes of devices on the system: 1. “Listener” mode: This is a receiver that receives data on the data bus; a system can have more than two listeners working simultaneously. 2. “Speaker” mode: This is a transmitter; a system can have more than two speakers, but only one speaker can operate at any given time. 3. “Controller” mode: This is a device that issues commands to other devices, such as addressing other devices or allowing speakers to use the bus. Only one controller can operate at any given time.

Timing of data transmission on the IEEE-488 bus: Data transmission on the IEEE-488 bus is asynchronous, meaning that each byte of data transmitted requires handshake communication using three signal lines: DAV, NRFD, and NDAC.