RISC-V Instruction Set Manual Volume I | 9. “Zihintpause” Pause Hint Extension, Version 2.0

From https://github.com/riscv/riscv-isa-manualTranslated by Visual Studio Code CopilotAI Engine: Claude Sonnet 4

9. “Zihintpause” Pause Hint Extension, Version 2.0

The PAUSE instruction is a HINT that indicates the instruction retirement rate of the current hardware thread should be temporarily reduced or paused. The duration of its effect must be bounded and may be zero.

Software can use the PAUSE instruction to reduce power consumption while executing spin-wait code sequences. Multithreaded cores may temporarily yield execution resources to other hardware threads when executing PAUSE. It is generally recommended to include the PAUSE instruction in spin-wait loop code sequences.

Future extensions may add primitives similar to the x86 MONITOR/MWAIT instructions, which provide a more efficient mechanism to wait for writes to specific memory locations. However, these instructions will not replace PAUSE. PAUSE is more appropriate when polling non-memory events, polling multiple events, or when software does not precisely know what event it is polling.

The duration of the PAUSE instruction’s effect may vary significantly between implementations. In typical implementations, this duration should be much less than the time taken for a context switch, and may be closer to the latency of a cache miss on-chip or the time scale of accessing main memory without a cache.

A series of PAUSE instructions can be used to create an accumulated delay that is roughly proportional to the number of PAUSE instructions. However, in portable code’s spin-wait loops, only one PAUSE instruction should be used before re-evaluating the loop condition; otherwise, on some implementations, the hardware thread may stall for too long, degrading system performance.

PAUSE is encoded as a FENCE instruction where pred=<span>W</span>, succ=<span>0</span>, fm=<span>0</span>, rd=<span>x0</span>, rs1=<span>x0</span>.

PAUSE is encoded as a hint in the FENCE opcode because it is expected that some implementations will deliberately stall the PAUSE instruction until outstanding memory transactions are completed. However, since the successor set is empty, PAUSE does not enforce any specific memory ordering—thus, it is indeed a HINT.

Like other FENCE instructions, PAUSE cannot be used in LR/SC sequences, as it would violate forward progress guarantees.

Choosing the predecessor set as W is arbitrary since the successor set is empty. Other hints similar to PAUSE may be encoded with different predecessor sets.

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