The Getting Started with Cortex-M3 guide is a new series of articles in this column, focusing on explaining the architecture design, register composition, concepts of clock and bus, functions and usage of various peripherals, and more.

The article will use a moderate amount of Rust code to assist in the explanation, but it will not focus on the application of the Rust language in embedded systems. Instead, to better explain the underlying principles, the code will perform low-level operations based on registers.

For production code, we recommend using a higher-level Hardware Abstraction Layer (HAL) for operations, and this part will be detailed in the Rust embedded development series articles.

In the embedded field, there are numerous diverse processor architectures, such as Cortex-A, Cortex-M, Cortex-R, MSP430, RISC-V, etc.

The Cortex-A series belongs to high-performance processors, targeting IoT, router devices, etc. The Cortex-M series focuses on low power consumption, low cost, and strong performance devices, while the Cortex-R series is aimed at low-latency real-time applications, suitable for wireless base stations, mobile phone basebands, etc.

The Cortex-M series is further divided into architectures like Cortex-M0, Cortex-M3, Cortex-M4, Cortex-M7, etc. The STM32F103 microcontroller we use is a processor produced by STMicroelectronics based on the Cortex-M3 architecture. This processor is inexpensive yet powerful, and most importantly, it has a very wide application globally, with teaching materials readily available, making it ideal for embedded beginners. Moreover, the Cortex-M3 architecture design is very classic; once mastered, transitioning to other embedded platforms is also very simple.

A microcontroller system (MCU) refers to a microprocessor that integrates memory, counters, timers, digital-to-analog converters, general-purpose serial ports, and other peripheral devices on the same chip, in addition to the core processor CPU.

Devices other than the CPU and memory are collectively referred to as peripherals, which are connected to the CPU via a bus. (Note: Although peripherals have the word ‘external’, they refer to functional components inside the microcontroller.)

The configuration of peripherals is generally designed by the manufacturer, so different Cortex-M3 MCUs will have different numbers/configurations of peripherals. For example, the STM32F103 model microcontroller provides:

• 2x SPI (Serial Peripheral Interface)

• 3x USART (Universal Synchronous/Asynchronous Receiver/Transmitter)

• 2x I2C (Inter-Integrated Circuit, bidirectional two-wire synchronous serial bus)

• 1x CAN (Controller Area Network)

• 1x USB

• 2x ADC (Analog to Digital Converter)

• 37x GPIO (General Purpose Input/Output)

• …

However, we do not directly operate the bus to control peripherals, but rather indirectly control them through special functions called registers.

The registers mentioned here are different from the CPU registers we are familiar with; they refer to a special memory address area, but they do not correspond to actual SRAM (Static Random-Access Memory) storage. Operations on registers are identical to operations on memory. Registers can be treated as memory for reading and writing, and reading and writing to the register memory segment will be converted into data exchange on the bus with peripherals.

The address and specific functions of the registers are designed by the chip manufacturer and are fixed at production. Therefore, each microcontroller generally provides a register data manual. We will frequently refer to this manual when explaining the STM32F103 microcontroller, and learning how to consult the register manual is also an important skill in embedded development.

Interrupts are an important function in embedded systems; they are similar to events in system programming. The difference is that interrupts are generated by hardware, and the program can respond to interrupts, with context protection and restoration during the response also handled by hardware. In fact, desktop CPUs also have interrupt functions, but these interrupts are generally handled by the operating system, while in bare-metal microcontroller programming, interrupts are entirely controlled by us.

There are many reasons for interrupts, such as:

• Clock timing completion

• External pin level change

• Serial data transmission completion

• Receiving serial information

• Microcontroller reset

When an interrupt occurs, the interrupt handler can interrupt the execution of the main program and hand it back to the main program after completion. Similarly, high-priority interrupt signals can also interrupt low-priority interrupt handlers, which is the meaning of nested interrupts.

NVIC (Nested Vector Interrupt Controller) is the interrupt control center under the Cortex-M3 architecture, responsible for all interrupt-related operations, such as interrupt priority judgment, context protection and recovery, interrupt enabling, etc. NVIC provides a set of registers, and we will configure it through the NVIC registers.

The SysTick system clock is a special clock embedded in the Cortex-M3 architecture. It can generate beats equal to the core frequency or can be set to a division by eight, generating beats at one-eighth of the core frequency. Unlike other general-purpose timers, SysTick is specified by the Cortex-M3 standard, so its usage and configuration do not change with the manufacturer, providing better portability.

The STM32F103 provides 8 general-purpose timers, among which two advanced timers TIM1 and TIM8 can generate three pairs of PWM complementary outputs, commonly used for driving three-phase motors. TIM2-TIM5 are ordinary timers, while TIM6 and TIM7 are basic timers (the difference lies in the presence or absence of comparison channels, which we will not focus on for now).

Timers and other peripherals that require timing (such as serial devices, SPI interfaces, etc.) will connect the clock signal to the peripheral bus (APB, Advanced Peripheral Bus). STM32 has two peripheral buses: APB1 and APB2, with APB2 running at full speed while APB1 only runs at half the core speed (36MHz). Different peripherals will connect to different buses, and which bus they connect to is fixed at the design stage and can be found in the manual.

GPIO (General Purpose Input Output) can be understood as the pins of the microcontroller. Most pins on the microcontroller (excluding power or ground pins) can be directly controlled by the program to output high or low levels or read input levels. Directly manipulating pin levels is the lowest level of pin control. Some peripherals bind input/output to specific pins, called pin multiplexing. For example, as shown in the figure below, pins PA10 and PA9 can also serve as the receiving and transmitting ports (TXD, RXD) of serial peripherals.

Recommended Reading

• Simple and straightforward interpretation of Cortex-M23/33 (Part 2)

• Simple and straightforward interpretation of Cortex-M23/33 (Part 1)

• Cortex-M0 Interrupt Control and System Control (Part 5)