CPU Pipeline Introduction and Performance Bottlenecks

CPU Pipeline Introduction and Performance Bottlenecks

In modern ARM CPU architecture, pipeline technology is one of the key means to enhance processor performance. It divides the instruction execution process into multiple stages, allowing multiple instructions to be in different execution stages at the same time, thus achieving parallel processing of instructions and greatly improving the CPU’s execution efficiency. However, in actual … Read more

HTTP/2: Making the Web Fly

HTTP/2: Making the Web Fly

/ Today’s Tech News /Recently, the Ministry of Industry and Information Technology released the “Opinions on Innovating the Management of the Information and Communication Industry and Optimizing the Business Environment”, which mentioned accelerating the revision of the “Telecommunication Business Classification Directory”, promoting business classification and definition to better meet the development needs of new technologies … Read more

From Slow to SIMD: Discussing Go Bounds Check Elimination

From Slow to SIMD: Discussing Go Bounds Check Elimination

In the translated article from Slow to SIMD, a SourceGraph engineer discusses one optimization technique known as Bounds Check Elimination (BCE), and poses a question to the readers: “ Why use a[i:i+4:i+4] instead of a[i:i+4]? The first part of this article answers this question. The second part introduces a better method for bounds check elimination. … Read more

SIMD Instruction Set Practical Guide: Unlocking CPU’s Last 1% Power

SIMD Instruction Set Practical Guide: Unlocking CPU's Last 1% Power

“My i9 processor is rated at 5GHz, why is processing this array still so slow?!” In the late-night office, Li Lei stared at the slowly moving progress bar, smashing his coffee cup on the table for the nth time. This veteran game client engineer was troubled by a new physical collision detection algorithm—despite optimizing the … Read more

SIMD Optimization: Boosting Performance of Compute-Intensive Code

SIMD Optimization: Boosting Performance of Compute-Intensive Code

SIMD Optimization: Make Your C++ Code Fly! Hello everyone, today I want to share with you a very cool performance optimization technique – SIMD (Single Instruction Multiple Data). As a veteran in the field of performance optimization, I can tell you that mastering SIMD technology can enhance the performance of your compute-intensive code by 3-4 … Read more

In-Depth Analysis of SIMD Parallel Computing Optimization Strategies in LeetCode

In-Depth Analysis of SIMD Parallel Computing Optimization Strategies in LeetCode

# In-Depth Analysis of SIMD Parallel Computing Optimization Strategies in LeetCode Hello everyone! I am Xiao Ou. Today, I will take you to learn about a super cool performance optimization technique – SIMD parallel computing. Sounds impressive, right? Don't worry, I'll explain how this "speed-up artifact" works in the simplest way possible. We will also … Read more

Exploring SIMDJSON: 2.5x Performance Boost Over Fastjson2

Exploring SIMDJSON: 2.5x Performance Boost Over Fastjson2

Hello everyone, I’m Tim. We all know that due to various issues with the Java language, vectorization has always been synonymous with C++ or Rust. Recently, an open-source JSON parsing library called simdjson-java, which uses Java’s vectorization API, has emerged, offering a performance that is 2.5 times faster than the Fastjson2 parsing library! This means … Read more

Doris Development Notes: Optimizing Hot Code in Storage Layer with SIMD Instructions

Doris Development Notes: Optimizing Hot Code in Storage Layer with SIMD Instructions

Recently, I’ve been developing the vectorized computing engine for Doris. During the investigation of CPU hotspots, I discovered CPU hotspot issues in the storage layer. Therefore, I attempted to optimize this part of the CPU hotspot code using SIMD instructions, achieving good performance improvements. This note documents the discovery of the issue, the solution process, … Read more

Solving Cache Misses in SIMD: A Distributed Frontier Paper Review

Solving Cache Misses in SIMD: A Distributed Frontier Paper Review

This article is based on the paper “Interleaved Multi-Vectorizing,” which has been accepted by VLDB 2020. The content below is personally interpreted by the first author Zhuhe Fang(Zhihu ID: 方竹河). For more details, please refer to the paper and video links at the end. VLDB (Very Large Database) conference started in 1975 and is one … Read more

Introduction to CPU SIMD

Introduction to CPU SIMD

Introduction The previous two articles introduced the topics of CPU and CPU Cache, with performance being a perpetual core concern. We also discussed the three walls faced in optimizing CPU performance: The power wall Currently, to increase computation speed by 30%, it requires double the voltage and heat, and this design approach cannot satisfy mobile … Read more