Low Power Design in Digital Chips (Part 2)

Low Power Design in Digital Chips (Part 2)

Continuing from the previous article, a typical low power design in digital chips is the addition of a clock gate. Another method is through parallel and pipelining techniques. Parallel and Pipelining The prominent advantage of hardware description languages is the parallelism in instruction execution. Multiple statements can process several signal data in parallel within the … Read more

CPU Parallel Processing Architectures: SIMD, MISD, MIMD

CPU Parallel Processing Architectures: SIMD, MISD, MIMD

In 1966, Micheal Flynn classified computer architectures based on the concepts of instruction and data streams, known as Flynn’s taxonomy. Flynn categorized computers into four basic types as follows: Single Instruction Single Data (SISD) systems Single Instruction Multiple Data (SIMD) systems Multiple Instruction Single Data (MISD) systems Multiple Instruction Multiple Data (MIMD) systems Single Instruction … Read more

Optimizing Compute-Intensive Tasks in Go: Parallel Processing with SIMD Instruction Sets for 4x Speedup

Optimizing Compute-Intensive Tasks in Go: Parallel Processing with SIMD Instruction Sets for 4x Speedup

Click the “blue text” above to follow us Have you ever had this experience? You wrote a program to process a large amount of data, went to make a cup of coffee, and came back to find the program still “buzzing” away. Anxiously waiting, you finally conclude: the performance is lacking! Especially when dealing with … Read more

Detailed Explanation of Robot Controller Types

Detailed Explanation of Robot Controller Types

The robot controller, as one of the core components of industrial robots, has a decisive impact on the performance of robots, influencing their development to a certain extent. As the core part of a robot, the robot controller is one of the key components that affect robot performance, and it has a significant impact on … Read more

From FPGA to ASIC: The Journey of AI Chip Design

From FPGA to ASIC: The Journey of AI Chip Design

Perhaps some team is designing an embedded inference engine for edge computing, or is furthering automotive vision processing, or perhaps they possess insights in the data center domain that can challenge NVIDIA and Google! However, amidst the broad performance demands, environments, and applications, AI accelerator architectures face unique challenges not only in design but also … Read more

Why I Use Makefile for Processes

Why I Use Makefile for Processes

Automatically check if target files or source files exist. If the source files are not found, exit the make process. If the target files are found, skip this make step. Automatically check for changes in target files or source files. If the source files are modified, regenerate the corresponding target files. Easy to run multiple … Read more